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Searched refs:M4 (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.4/Documentation/arm/stm32/
Dstm32f429-overview.rst8 The STM32F429 is a Cortex-M4 MCU aimed at various applications.
11 - ARM Cortex-M4 up to 180MHz with FPU
/Linux-v5.4/arch/sparc/kernel/
Dtraps_64.c1099 #define M4 146 macro
1107 /*05*/M2, 44, 28, M2, M, M2, M2, 52, 68, M2, M2, 62, M2, M3, M3, M4,
1108 /*06*/M2, 26, 106, M2, 64, M, M2, 2, 120, M, M2, M3, M, M3, M3, M4,
1109 /*07*/116, M2, M2, M3, M2, M3, M, M4, M2, 58, 54, M2, M, M4, M4, M3,
1113 /*0b*/103, M, M2, M3, M2, M3, M3, M4, M2, 48, M, M, 73, M2, M, M3,
1115 /*0d*/102, M2, M, M, M2, M3, M3, M, M2, M3, M3, M2, M, M4, M, M3,
1116 /*0e*/98, M, M2, M3, M2, M, M3, M4, M2, M3, M3, M4, M3, M, M, M,
1117 /*0f*/M2, M3, M3, M, M3, M, M, M, 56, M4, M, M3, M4, M, M, M,
1121 /*13*/94, M, M2, M3, M2, M, M3, M, M2, M, 79, M, 69, M, M4, M,
1122 /*14*/M2, 93, 92, M, 91, M, M2, 8, 90, M2, M2, M, M, M, M, M4,
[all …]
/Linux-v5.4/arch/arm64/boot/dts/rockchip/
Drk3399-nanopi-m4.dts3 * FriendlyElec NanoPi M4 board device tree source
16 model = "FriendlyElec NanoPi M4";
/Linux-v5.4/arch/arm/boot/dts/
Dvf610m4-colibri.dts2 * Device tree for Colibri VF61 Cortex-M4 support
49 model = "VF610 Cortex-M4";
Dvf610m4-cosmic.dts2 * Device tree for Cosmic+ VF6xx Cortex-M4 support
51 model = "VF610 Cortex-M4";
Dvf610m4.dtsi2 * Device tree for VF6xx Cortex-M4 support
Dimx6sx-udoo-neo.dtsi327 /* Cortex-M4 serial */
Dimx6sx-nitrogen6sx.dts135 label = "M4";
Dimx7s.dtsi239 /* M4 input */
/Linux-v5.4/Documentation/devicetree/bindings/remoteproc/
Dimx-rproc.txt4 This binding provides support for ARM Cortex M4 Co-processor found on some
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dimx7ulp-clock.txt7 The clocking scheme provides clear separation between M4 domain
13 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
/Linux-v5.4/drivers/firmware/imx/
DKconfig23 SCU firmware running on M4.
/Linux-v5.4/Documentation/devicetree/bindings/arm/freescale/
Dfsl,vf610-mscm-ir.txt8 which comes with a Cortex-A5/Cortex-M4 combination).
Dfsl,scu.txt31 be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx7ulp-pinctrl.txt3 i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7
/Linux-v5.4/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g4.c1501 #define M4 182 macro
1502 SIG_EXPR_LIST_DECL_SINGLE(M4, GPIOW6, GPIOW6, SIG_DESC_SET(SCUA0, 30));
1503 SIG_EXPR_LIST_DECL_SINGLE(M4, ADC6, ADC6);
1504 PIN_DECL_(M4, SIG_EXPR_LIST_PTR(M4, GPIOW6), SIG_EXPR_LIST_PTR(M4, ADC6));
1505 FUNC_GROUP_DECL(ADC6, M4);
2065 ASPEED_PINCTRL_PIN(M4),
2504 { PIN_CONFIG_BIAS_PULL_DOWN, { M4, M4 }, SCUA8, 10 },
2505 { PIN_CONFIG_BIAS_DISABLE, { M4, M4 }, SCUA8, 10 },
/Linux-v5.4/drivers/remoteproc/
DKconfig21 Say y here to support iMX's remote processors (Cortex M4
/Linux-v5.4/arch/arm/
DKconfig330 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
765 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
775 with a range of available cores like Cortex-M3/M4/M7.