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Searched refs:CLK_SET_RATE_GATE (Results 1 – 25 of 50) sorted by relevance

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/Linux-v5.4/drivers/clk/ux500/
Du8500_of_clk.c152 CLK_SET_RATE_GATE); in u8500_clk_init()
159 CLK_SET_RATE_GATE); in u8500_clk_init()
163 CLK_SET_RATE_GATE); in u8500_clk_init()
167 CLK_SET_RATE_GATE); in u8500_clk_init()
174 CLK_SET_RATE_GATE); in u8500_clk_init()
193 CLK_SET_RATE_GATE); in u8500_clk_init()
212 100000000, CLK_SET_RATE_GATE); in u8500_clk_init()
216 PRCMU_PLLDSI, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
220 PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
224 PRCMU_DSI1CLK, 0, CLK_SET_RATE_GATE); in u8500_clk_init()
[all …]
/Linux-v5.4/drivers/clk/qcom/
Dlcc-mdm9615.c119 .flags = CLK_SET_RATE_GATE,
225 .flags = CLK_SET_RATE_GATE, \
369 .flags = CLK_SET_RATE_GATE,
437 .flags = CLK_SET_RATE_GATE,
Dlcc-msm8960.c117 .flags = CLK_SET_RATE_GATE,
223 .flags = CLK_SET_RATE_GATE, \
367 .flags = CLK_SET_RATE_GATE,
435 .flags = CLK_SET_RATE_GATE,
Dlcc-ipq806x.c136 .flags = CLK_SET_RATE_GATE,
250 .flags = CLK_SET_RATE_GATE,
330 .flags = CLK_SET_RATE_GATE,
Dgcc-mdm9615.c779 .flags = CLK_SET_RATE_GATE,
828 .flags = CLK_SET_RATE_GATE,
1043 .flags = CLK_SET_RATE_GATE,
1092 .flags = CLK_SET_RATE_GATE,
1147 .flags = CLK_SET_RATE_GATE,
1202 .flags = CLK_SET_RATE_GATE,
1257 .flags = CLK_SET_RATE_GATE,
Dgcc-ipq806x.c1131 .flags = CLK_SET_RATE_GATE,
1180 .flags = CLK_SET_RATE_GATE,
1587 .flags = CLK_SET_RATE_GATE,
1679 .flags = CLK_SET_RATE_GATE,
1771 .flags = CLK_SET_RATE_GATE,
1868 .flags = CLK_SET_RATE_GATE,
2005 .flags = CLK_SET_RATE_GATE,
2075 .flags = CLK_SET_RATE_GATE,
2145 .flags = CLK_SET_RATE_GATE,
2209 .flags = CLK_SET_RATE_GATE,
Dgcc-msm8960.c1619 .flags = CLK_SET_RATE_GATE,
1668 .flags = CLK_SET_RATE_GATE,
2027 .flags = CLK_SET_RATE_GATE,
2081 .flags = CLK_SET_RATE_GATE,
2130 .flags = CLK_SET_RATE_GATE,
2179 .flags = CLK_SET_RATE_GATE,
2228 .flags = CLK_SET_RATE_GATE,
2323 .flags = CLK_SET_RATE_GATE,
2390 .flags = CLK_SET_RATE_GATE,
2878 .flags = CLK_SET_RATE_GATE,
[all …]
Dgcc-msm8660.c1393 .flags = CLK_SET_RATE_GATE,
1442 .flags = CLK_SET_RATE_GATE,
1798 .flags = CLK_SET_RATE_GATE,
1852 .flags = CLK_SET_RATE_GATE,
1901 .flags = CLK_SET_RATE_GATE,
1968 .flags = CLK_SET_RATE_GATE,
/Linux-v5.4/drivers/clk/h8300/
Dclk-div.c44 CLK_SET_RATE_GATE, divcr, offset, width, in h8300_div_clk_setup()
/Linux-v5.4/drivers/clk/imx/
Dclk-imx7ulp.c90 … = imx_clk_hw_divider_flags("apll_pre_div", "apll_pre_sel", base + 0x508, 8, 3, CLK_SET_RATE_GATE); in imx7ulp_clk_scg1_init()
91 … = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE); in imx7ulp_clk_scg1_init()
115 …LK_SPLL_BUS_CLK] = imx_clk_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x60… in imx7ulp_clk_scg1_init()
Dclk-imx6sll.c192 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
194 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock); in imx6sll_clocks_init()
196 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
198 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
Dclk-composite-7ulp.c78 &clk_gate_ops, CLK_SET_RATE_GATE | in imx7ulp_clk_composite()
Dclk-imx6ul.c219 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
221 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 15, 1, 0, &imx_ccm_lock); in imx6ul_clocks_init()
223 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
225 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
Dclk-imx7d.c442 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 21, 2, 0, test_div_table, &imx_ccm_lock); in imx7d_clocks_init()
444 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 19, 2, 0, test_div_table, &imx_ccm_lock); in imx7d_clocks_init()
446 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
448 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 19, 2, 0, test_div_table, &imx_ccm_lock); in imx7d_clocks_init()
450 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
Dclk-pfdv2.c192 init.flags = CLK_SET_RATE_GATE; in imx_clk_pfdv2()
Dclk-pllv4.c227 init.flags = CLK_SET_RATE_GATE; in imx_clk_pllv4()
/Linux-v5.4/drivers/clk/at91/
Dclk-audio-pll.c467 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_audio_pll_frac()
497 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pad()
528 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in at91_clk_register_audio_pll_pmc()
Dclk-plldiv.c90 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_plldiv()
Dclk-h32mx.c100 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_h32mx()
Dclk-utmi.c140 init.flags = CLK_SET_RATE_GATE; in at91_clk_register_utmi()
Dclk-smd.c124 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91sam9x5_clk_register_smd()
Dclk-usb.c209 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | in _at91sam9x5_clk_register_usb()
259 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT; in at91sam9n12_clk_register_usb()
Dclk-programmable.c203 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in at91_clk_register_programmable()
/Linux-v5.4/drivers/clk/microchip/
Dclk-pic32mzda.c53 .flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE,\
/Linux-v5.4/drivers/gpu/drm/mediatek/
Dmtk_mt8173_hdmi_phy.c326 .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,

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