Searched refs:A23 (Results 1 – 25 of 36) sorted by relevance
12
61 - Allwinner A23 (sun8i)65 http://dl.linux-sunxi.org/A23/A23%20Datasheet%20V1.0%2020130830.pdf69 http://dl.linux-sunxi.org/A23/A23%20User%20Manual%20V1.0%2020130830.pdf
12 "allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A2321 "allwinner,sun8i-a23-axi-clk" - for the AXI clock on A2336 "allwinner,sun8i-a23-ahb1-gates-clk" - for the AHB1 gates on A2342 "allwinner,sun8i-a23-apb0-clk" - for the APB0 clock on A2350 "allwinner,sun8i-a23-apb0-gates-clk" - for the APB0 gates on A2360 "allwinner,sun8i-a23-apb1-gates-clk" - for the APB1 gates on A2363 "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A2376 "allwinner,sun8i-a23-mbus-clk" - for the MBUS clock on A2384 "allwinner,sun8i-a23-usb-clk" - for usb gates + resets on A23
36 bool "Support for the Allwinner A23 PIO"56 bool "Support for the Allwinner A23 and A33 R-PIO"
14 A23, A31, A80) SoCs. These drivers are kept around for
47 bool "Support for the Allwinner A23 CCU"
48 model = "Q8 A23 Tablet";
53 model = "Allwinner A23 Evaluation Board";
360 gpios = <&pioE 23 GPIO_ACTIVE_LOW>; /* PE23, conflicts with A23, CTS2 */
915 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
103 || STDW .D1T1 A23:A22,*A15--[1]137 LDDW .D1T1 *++A15[1],A23:A22
51 The valid sections compatible for A23/A33 are:
112 AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
377 #define A23 47 macro378 SIG_EXPR_LIST_DECL_SESG(A23, SD1WP, SD1, SIG_DESC_SET(SCU414, 15));379 SIG_EXPR_LIST_DECL_SEMG(A23, PWM15, PWM15G0, PWM15, SIG_DESC_SET(SCU4B4, 15));380 PIN_DECL_2(A23, GPIOF7, SD1WP, PWM15);381 GROUP_DECL(PWM15G0, A23);383 FUNC_GROUP_DECL(SD1, D22, E22, D23, C23, C22, A25, A24, A23);1561 ASPEED_PINCTRL_PIN(A23),
54 - vcc-pd-supply: for the A23, A31, A31s, A64, A80, A83t, H3, H5 and R40 SoCs
187 A25, A24, A23, A22, IRQ5, IRQ4_BS, enumerator581 PINMUX_DATA(A23_MARK, A23),1067 GPIO_FN(A23),1283 A23, PTE5_OUT, 0, PTE5_IN,
759 GPIO_FN(A23),
702 PINMUX_IPSR_GPSR(IP1_15_14, A23),1407 GPIO_FN(A23), GPIO_FN(ST1_D0), GPIO_FN(LCD_M_DISP_A),
925 GPIO_FN(A23),
528 PINMUX_IPSR_GPSR(IP1_20, A23),
1265 GPIO_FN(A23),
189 #define IP4_19_16 FM(VI0_DATA9) FM(HCTS2_N) FM(PWM1_A) FM(A23) FM(FSO_CFE_0_N_B) F_(0, 0) F_(0,…
1467 GPIO_FN(A23),
205 And on the A23, A31, A31s and A33, you need one more clock line:271 (A31, A23, A33, A80), allows to dynamically adjust pixel
