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/Linux-v5.15/drivers/net/ipa/
Dipa_power.c78 struct ipa_interconnect *interconnect; member
82 struct ipa_interconnect *interconnect, in ipa_interconnect_init_one() argument
97 interconnect->path = path; in ipa_interconnect_init_one()
98 interconnect->average_bandwidth = data->average_bandwidth; in ipa_interconnect_init_one()
99 interconnect->peak_bandwidth = data->peak_bandwidth; in ipa_interconnect_init_one()
104 static void ipa_interconnect_exit_one(struct ipa_interconnect *interconnect) in ipa_interconnect_exit_one() argument
106 icc_put(interconnect->path); in ipa_interconnect_exit_one()
107 memset(interconnect, 0, sizeof(*interconnect)); in ipa_interconnect_exit_one()
114 struct ipa_interconnect *interconnect; in ipa_interconnect_init() local
119 interconnect = kcalloc(count, sizeof(*interconnect), GFP_KERNEL); in ipa_interconnect_init()
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/Linux-v5.15/Documentation/devicetree/bindings/interconnect/
Dinterconnect.txt4 The purpose of this document is to define a common set of generic interconnect
8 = interconnect providers =
10 The interconnect provider binding is intended to represent the interconnect
11 controllers in the system. Each provider registers a set of interconnect
12 nodes, which expose the interconnect related capabilities of the interconnect
14 etc. The consumer drivers set constraints on interconnect path (or endpoints)
15 depending on the use case. Interconnect providers can also be interconnect
20 - compatible : contains the interconnect provider compatible string
21 - #interconnect-cells : number of cells in a interconnect specifier needed to
22 encode the interconnect node id and optionally add a
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/Linux-v5.15/Documentation/driver-api/
Dinterconnect.rst16 The interconnect bus is hardware with configurable parameters, which can be
18 An example of interconnect buses are the interconnects between various
22 Below is a simplified diagram of a real-world SoC interconnect bus topology.
55 Interconnect provider is the software definition of the interconnect hardware.
56 The interconnect providers on the above diagram are M NoC, S NoC, C NoC, P NoC
59 Interconnect node is the software definition of the interconnect hardware
60 port. Each interconnect provider consists of multiple interconnect nodes,
61 which are connected to other SoC components including other interconnect
63 called an interconnect node, which belongs to the Mem NoC interconnect provider.
70 include multiple master-slave pairs across several interconnect providers.
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/Linux-v5.15/drivers/interconnect/imx/
DMakefile1 imx-interconnect-objs := imx.o
2 imx8mm-interconnect-objs := imx8mm.o
3 imx8mq-interconnect-objs := imx8mq.o
4 imx8mn-interconnect-objs := imx8mn.o
6 obj-$(CONFIG_INTERCONNECT_IMX) += imx-interconnect.o
7 obj-$(CONFIG_INTERCONNECT_IMX8MM) += imx8mm-interconnect.o
8 obj-$(CONFIG_INTERCONNECT_IMX8MQ) += imx8mq-interconnect.o
9 obj-$(CONFIG_INTERCONNECT_IMX8MN) += imx8mn-interconnect.o
DKconfig2 tristate "i.MX interconnect drivers"
5 Generic interconnect drivers for i.MX SOCs
8 tristate "i.MX8MM interconnect driver"
12 tristate "i.MX8MN interconnect driver"
16 tristate "i.MX8MQ interconnect driver"
/Linux-v5.15/Documentation/devicetree/bindings/bus/
Dti-sysc.txt1 Texas Instruments sysc interconnect target module wrapper binding
3 Texas Instruments SoCs can have a generic interconnect target module
5 interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
8 of the interconnect.
10 Each interconnect target module can have one or more devices connected to
11 it. There is a set of control registers for managing interconnect target
12 module clocks, idle modes and interconnect level resets for the module.
15 space of the first child device IP block managed by the interconnect
43 - reg shall have register areas implemented for the interconnect
47 interconnect target module in question such as
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/Linux-v5.15/drivers/interconnect/qcom/
DKconfig3 bool "Qualcomm Network-on-Chip interconnect drivers"
6 Support for Qualcomm's Network-on-Chip interconnect hardware.
12 tristate "Qualcomm MSM8916 interconnect driver"
21 tristate "Qualcomm MSM8939 interconnect driver"
30 tristate "Qualcomm MSM8974 interconnect driver"
39 tristate "Qualcomm OSM L3 interconnect driver"
42 Say y here to support the Operating State Manager (OSM) interconnect
46 tristate "Qualcomm QCS404 interconnect driver"
69 tristate "Qualcomm SC7180 interconnect driver"
78 tristate "Qualcomm SC7280 interconnect driver"
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/Linux-v5.15/drivers/interconnect/samsung/
DKconfig3 bool "Samsung SoC interconnect drivers"
9 tristate "Exynos generic interconnect driver"
13 Generic interconnect driver for Exynos SoCs.
DMakefile2 exynos-interconnect-objs := exynos.o
4 obj-$(CONFIG_INTERCONNECT_EXYNOS) += exynos-interconnect.o
/Linux-v5.15/Documentation/devicetree/bindings/arm/omap/
Dl4.txt1 L4 interconnect bindings
3 These bindings describe the OMAP SoCs L4 interconnect bus.
19 - reg : registers link agent and interconnect agent and access protection
21 interconnect agent instances, "ap" for access if it exists
25 l4: interconnect@48000000 {
/Linux-v5.15/drivers/interconnect/
DKconfig14 source "drivers/interconnect/imx/Kconfig"
15 source "drivers/interconnect/qcom/Kconfig"
16 source "drivers/interconnect/samsung/Kconfig"
/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.txt63 * Following bus parameters are required for interconnect bandwidth scaling:
64 - interconnects: Pairs of phandles and interconnect provider specifier
66 the interconnect path.
68 - interconnect-names: For sdhc, we have two main paths.
71 For Data interconnect path the name supposed to be
72 is "sdhc-ddr" and for config interconnect path it is
75 interconnect/ for more details.
96 interconnect-names = "sdhc-ddr","cpu-sdhc";
/Linux-v5.15/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt24 should have the interconnect endpoints set to the Memory Client and External
45 - interconnect-names: Must include name of the interconnect path for each
46 interconnect entry. Consult TRM documentation for information about
128 - interconnect-names: Must include name of the interconnect path for each
129 interconnect entry. Consult TRM documentation for information about
147 - interconnect-names: Must include name of the interconnect path for each
148 interconnect entry. Consult TRM documentation for information about
166 - interconnect-names: Must include name of the interconnect path for each
167 interconnect entry. Consult TRM documentation for information about
185 - interconnect-names: Must include name of the interconnect path for each
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/Linux-v5.15/Documentation/devicetree/bindings/arm/
Dcci.txt2 ARM CCI cache coherent interconnect binding description
6 cache coherent interconnect (CCI) that is capable of monitoring bus
14 * CCI interconnect node
20 through the CCI interconnect is the same as the one seen from the
51 CCI interconnect node can define the following child nodes:
56 Parent node must be CCI interconnect node.
85 Parent node must be CCI interconnect node.
124 * CCI interconnect bus masters
129 A CCI interconnect bus master node must contain the following
/Linux-v5.15/Documentation/devicetree/bindings/devfreq/
Dexynos-bus.txt54 Optional properties for the interconnect functionality (QoS frequency
56 - #interconnect-cells: should be 0.
57 - interconnects: as documented in ../interconnect.txt, describes a path at the
58 higher level interconnects used by this interconnect provider.
59 If this interconnect provider is directly linked to a top level interconnect
61 the interconnect graph by linking its node to a node registered by provider
437 An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on
438 Exynos4412 SoC with video mixer as an interconnect consumer device.
447 #interconnect-cells = <0>;
455 #interconnect-cells = <0>;
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
714 interconnect-names = "sdhc-ddr","cpu-sdhc";
792 interconnect-names = "qup-core", "qup-config",
813 interconnect-names = "qup-core", "qup-config";
829 interconnect-names = "qup-core", "qup-config";
846 interconnect-names = "qup-core", "qup-config",
867 interconnect-names = "qup-core", "qup-config";
883 interconnect-names = "qup-core", "qup-config";
900 interconnect-names = "qup-core", "qup-config",
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Dsdm845.dtsi15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
1138 interconnect-names = "qup-core";
1156 interconnect-names = "qup-core", "qup-config", "qup-memory";
1172 interconnect-names = "qup-core", "qup-config";
1188 interconnect-names = "qup-core", "qup-config";
1207 interconnect-names = "qup-core", "qup-config", "qup-memory";
1223 interconnect-names = "qup-core", "qup-config";
1239 interconnect-names = "qup-core", "qup-config";
1258 interconnect-names = "qup-core", "qup-config", "qup-memory";
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Dsc7280.dtsi10 #include <dt-bindings/interconnect/qcom,sc7280.h>
289 clk_virt: interconnect {
291 #interconnect-cells = <2>;
482 interconnect-names = "sdhc-ddr","cpu-sdhc";
540 cnoc2: interconnect@1500000 {
543 #interconnect-cells = <2>;
547 cnoc3: interconnect@1502000 {
550 #interconnect-cells = <2>;
554 mc_virt: interconnect@1580000 {
557 #interconnect-cells = <2>;
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Dsm8350.dtsi9 #include <dt-bindings/interconnect/qcom,sm8350.h>
15 #include <dt-bindings/interconnect/qcom,sm8350.h>
614 config_noc: interconnect@1500000 {
617 #interconnect-cells = <1>;
621 mc_virt: interconnect@1580000 {
624 #interconnect-cells = <1>;
628 system_noc: interconnect@1680000 {
631 #interconnect-cells = <1>;
635 aggre1_noc: interconnect@16e0000 {
638 #interconnect-cells = <1>;
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/Linux-v5.15/Documentation/devicetree/bindings/display/msm/
Dgpu.txt25 - interconnects: optional phandle to an interconnect provider. See
26 ../interconnect/interconnect.txt for details. Some A3xx and all A4xx platforms
28 - interconnect-names: The names of the interconnect paths that correspond to the
120 interconnect-names = "gfx-mem";
/Linux-v5.15/arch/arm/boot/dts/
Dqcom-sdx55.dtsi11 #include <dt-bindings/interconnect/qcom,sdx55.h>
257 mc_virt: interconnect@1100000 {
260 #interconnect-cells = <1>;
264 mem_noc: interconnect@9680000 {
267 #interconnect-cells = <1>;
271 system_noc: interconnect@162c000 {
274 #interconnect-cells = <1>;
278 ipa_virt: interconnect@1e00000 {
281 #interconnect-cells = <1>;
341 interconnect-names = "memory-a",
Dqcom-msm8974.dtsi4 #include <dt-bindings/interconnect/qcom,msm8974.h>
1366 bimc: interconnect@fc380000 {
1369 #interconnect-cells = <1>;
1375 snoc: interconnect@fc460000 {
1378 #interconnect-cells = <1>;
1384 pnoc: interconnect@fc468000 {
1387 #interconnect-cells = <1>;
1393 ocmemnoc: interconnect@fc470000 {
1396 #interconnect-cells = <1>;
1402 mmssnoc: interconnect@fc478000 {
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/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dti-clkctrl.txt4 interconnect target module. The clkctrl clock controller manages functional
8 interconnect target module on omap4 and later variants.
/Linux-v5.15/arch/arm64/boot/dts/nvidia/
Dtegra194.dtsi64 interconnect-names = "dma-mem", "write";
407 #interconnect-cells = <1>;
441 #interconnect-cells = <0>;
736 interconnect-names = "dma-mem", "write";
763 interconnect-names = "dma-mem", "write";
795 interconnect-names = "dma-mem", "write";
827 interconnect-names = "dma-mem", "write";
953 interconnect-names = "dma-mem", "write";
986 interconnect-names = "dma-mem", "write";
1412 interconnect-names = "dma-mem";
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/Linux-v5.15/drivers/bus/
DKconfig21 interconnect for ARM platforms.
67 means of an embedded on top of the interconnect errors handler
134 Driver to enable OMAP interconnect error handling driver.
201 bool "TI sysc interconnect target module driver"
204 Generic driver for Texas Instruments interconnect target module

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