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Searched refs:dwbc (Results 1 – 19 of 19) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddwb.h161 struct dwbc { struct
182 struct dwbc *dwbc, argument
186 struct dwbc *dwbc,
189 bool (*disable)(struct dwbc *dwbc);
192 struct dwbc *dwbc,
196 struct dwbc *dwbc);
199 struct dwbc *dwbc,
203 struct dwbc *dwbc,
208 struct dwbc *dwbc,
215 struct dwbc *dwbc,
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb.c46 static bool dwb3_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb3_get_caps() argument
66 void dwb3_config_fc(struct dwbc *dwbc, struct dc_dwb_params *params) in dwb3_config_fc() argument
68 struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc); in dwb3_config_fc()
88 dwb3_set_stereo(dwbc, &params->stereo_params); in dwb3_config_fc()
91 bool dwb3_enable(struct dwbc *dwbc, struct dc_dwb_params *params) in dwb3_enable() argument
93 struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc); in dwb3_enable()
94 DC_LOG_DWB("%s dwb3_enabled at inst = %d", __func__, dwbc->inst); in dwb3_enable()
100 dwb3_config_fc(dwbc, params); in dwb3_enable()
103 dwb3_program_hdr_mult(dwbc, params); in dwb3_enable()
104 dwb3_set_gamut_remap(dwbc, params); in dwb3_enable()
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Ddcn30_dwb_cm.c270 struct dwbc *dwbc, in dwb3_ogam_set_input_transfer_func() argument
273 struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc); in dwb3_ogam_set_input_transfer_func()
298 struct dwbc *dwbc, in dwb3_program_gamut_remap() argument
303 struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc); in dwb3_program_gamut_remap()
353 struct dwbc *dwbc, in dwb3_set_gamut_remap() argument
356 struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc); in dwb3_set_gamut_remap()
362 dwb3_program_gamut_remap(dwbc, NULL, adjust.gamut_coef_format, CM_GAMUT_REMAP_MODE_BYPASS); in dwb3_set_gamut_remap()
376 dwb3_program_gamut_remap(dwbc, arr_reg_val, in dwb3_set_gamut_remap()
379 dwb3_program_gamut_remap(dwbc, arr_reg_val, in dwb3_set_gamut_remap()
386 struct dwbc *dwbc, in dwb3_program_hdr_mult() argument
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Ddcn30_dwb.h876 struct dwbc base;
889 bool dwb3_enable(struct dwbc *dwbc, struct dc_dwb_params *params);
891 bool dwb3_disable(struct dwbc *dwbc);
893 bool dwb3_update(struct dwbc *dwbc, struct dc_dwb_params *params);
895 bool dwb3_is_enabled(struct dwbc *dwbc);
897 void dwb3_set_stereo(struct dwbc *dwbc,
900 void dwb3_set_new_content(struct dwbc *dwbc,
903 void dwb3_config_fc(struct dwbc *dwbc,
906 void dwb3_set_denorm(struct dwbc *dwbc, struct dc_dwb_params *params);
909 struct dwbc *dwbc,
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Ddcn30_hwseq.c247 struct dwbc *dwb; in dcn30_update_writeback()
248 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn30_update_writeback()
264 struct dwbc *dwb; in dcn30_mmhubbub_warmup()
270 dwb = dc->res_pool->dwbc[wb_info[i].dwb_pipe_inst]; in dcn30_mmhubbub_warmup()
299 dwb = dc->res_pool->dwbc[wb_info[i].dwb_pipe_inst]; in dcn30_mmhubbub_warmup()
322 struct dwbc *dwb; in dcn30_enable_writeback()
326 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn30_enable_writeback()
351 struct dwbc *dwb; in dcn30_disable_writeback()
355 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn30_disable_writeback()
374 struct dwbc *dwb; in dcn30_program_all_writeback_pipes_in_tree()
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Ddcn30_resource.c1280 if (pool->base.dwbc[i] != NULL) { in dcn30_resource_destruct()
1281 kfree(TO_DCN30_DWBC(pool->base.dwbc[i])); in dcn30_resource_destruct()
1282 pool->base.dwbc[i] = NULL; in dcn30_resource_destruct()
1372 pool->dwbc[i] = &dwbc30->base; in dcn30_dwbc_create()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dwb.c50 static bool dwb2_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb2_get_caps() argument
52 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); in dwb2_get_caps()
72 void dwb2_config_dwb_cnv(struct dwbc *dwbc, struct dc_dwb_params *params) in dwb2_config_dwb_cnv() argument
74 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); in dwb2_config_dwb_cnv()
99 static bool dwb2_enable(struct dwbc *dwbc, struct dc_dwb_params *params) in dwb2_enable() argument
101 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); in dwb2_enable()
121 dwb2_config_dwb_cnv(dwbc, params); in dwb2_enable()
124 dwb2_set_scaler(dwbc, params); in dwb2_enable()
135 bool dwb2_disable(struct dwbc *dwbc) in dwb2_disable() argument
137 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); in dwb2_disable()
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Ddcn20_dwb.h416 struct dwbc base;
429 bool dwb2_disable(struct dwbc *dwbc);
431 bool dwb2_is_enabled(struct dwbc *dwbc);
433 void dwb2_set_stereo(struct dwbc *dwbc,
436 void dwb2_set_new_content(struct dwbc *dwbc,
439 void dwb2_config_dwb_cnv(struct dwbc *dwbc,
442 void dwb2_set_scaler(struct dwbc *dwbc, struct dc_dwb_params *params);
Ddcn20_hwseq.c1908 struct dwbc *dwb; in dcn20_enable_writeback()
1914 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
1934 struct dwbc *dwb; in dcn20_disable_writeback()
1938 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn20_disable_writeback()
2531 res_pool->dwbc[i]->mcif = res_pool->mcif_wb[i]; in dcn20_fpga_init_hw()
Ddcn20_resource.c1528 if (pool->base.dwbc[i] != NULL) { in dcn20_resource_destruct()
1529 kfree(TO_DCN20_DWBC(pool->base.dwbc[i])); in dcn20_resource_destruct()
1530 pool->base.dwbc[i] = NULL; in dcn20_resource_destruct()
3386 pool->dwbc[i] = &dwbc20->base; in dcn20_dwbc_create()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dwb.c47 static bool dwb1_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb1_get_caps() argument
66 static bool dwb1_enable(struct dwbc *dwbc, struct dc_dwb_params *params) in dwb1_enable() argument
68 struct dcn10_dwbc *dwbc10 = TO_DCN10_DWBC(dwbc); in dwb1_enable()
71 dwbc->funcs->disable(dwbc); in dwb1_enable()
83 static bool dwb1_disable(struct dwbc *dwbc) in dwb1_disable() argument
85 struct dcn10_dwbc *dwbc10 = TO_DCN10_DWBC(dwbc); in dwb1_disable()
Ddcn10_dwb.h256 struct dwbc base;
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h226 struct dwbc *dwbc[MAX_DWB_PIPES]; member
373 struct dwbc *dwbc; member
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/
Ddc_stream.c433 struct dwbc *dwb; in dc_stream_add_writeback()
452 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
472 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
483 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c853 pool->dwbc[i] = &dwbc30->base; in dcn302_dwbc_create()
1203 if (pool->dwbc[i] != NULL) { in dcn302_resource_destruct()
1204 kfree(TO_DCN30_DWBC(pool->dwbc[i])); in dcn302_resource_destruct()
1205 pool->dwbc[i] = NULL; in dcn302_resource_destruct()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c799 pool->dwbc[i] = &dwbc30->base; in dcn303_dwbc_create()
1133 if (pool->dwbc[i] != NULL) { in dcn303_resource_destruct()
1134 kfree(TO_DCN30_DWBC(pool->dwbc[i])); in dcn303_resource_destruct()
1135 pool->dwbc[i] = NULL; in dcn303_resource_destruct()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c1311 if (pool->base.dwbc[i] != NULL) { in dcn301_destruct()
1312 kfree(TO_DCN30_DWBC(pool->base.dwbc[i])); in dcn301_destruct()
1313 pool->base.dwbc[i] = NULL; in dcn301_destruct()
1397 pool->dwbc[i] = &dwbc30->base; in dcn301_dwbc_create()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c1403 if (pool->base.dwbc[i] != NULL) { in dcn31_resource_destruct()
1404 kfree(TO_DCN30_DWBC(pool->base.dwbc[i])); in dcn31_resource_destruct()
1405 pool->base.dwbc[i] = NULL; in dcn31_resource_destruct()
1492 pool->dwbc[i] = &dwbc30->base; in dcn31_dwbc_create()
/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c986 if (pool->base.dwbc[i] != NULL) { in dcn21_resource_destruct()
987 kfree(TO_DCN20_DWBC(pool->base.dwbc[i])); in dcn21_resource_destruct()
988 pool->base.dwbc[i] = NULL; in dcn21_resource_destruct()