| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_resource.c | 1627 context->bw_ctx.dml.ip.det_buffer_size_kbytes = DCN3_1_DEFAULT_DET_SIZE; in dcn31_populate_dml_pipes_from_context()
1634 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn31_populate_dml_pipes_from_context()
1645 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM… in dcn31_update_soc_for_wm_a()
1646 …context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A… in dcn31_update_soc_for_wm_a()
1647 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_t… in dcn31_update_soc_for_wm_a()
1658 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp()
1660 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn31_calculate_wm_and_dlg_fp()
1661 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn31_calculate_wm_and_dlg_fp()
1665 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
1674 pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dcfclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 2418 wb_arb_params = &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[dwb_pipe]; in dcn20_set_mcif_arb_params()
2429 …wb_arb_params->cli_watermark[k] = get_wm_writeback_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) *… in dcn20_set_mcif_arb_params()
2430 …wb_arb_params->pstate_watermark[k] = get_wm_writeback_dram_clock_change(&context->bw_ctx.dml, pipe… in dcn20_set_mcif_arb_params()
2632 struct vba_vars_st *v = &context->bw_ctx.dml.vba; in dcn20_validate_apply_pipe_split_flags()
2687 for (vlevel_split = vlevel; vlevel <= context->bw_ctx.dml.soc.num_states; vlevel++) in dcn20_validate_apply_pipe_split_flags()
2692 if (vlevel > context->bw_ctx.dml.soc.num_states) in dcn20_validate_apply_pipe_split_flags()
2835 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn20_fast_validate_bw()
2837 if (vlevel > context->bw_ctx.dml.soc.num_states) in dcn20_fast_validate_bw()
2855 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn20_fast_validate_bw()
2874 && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) in dcn20_fast_validate_bw()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 1551 dc->current_state->bw_ctx.dml.ip.writeback_line_buffer_buffer_size); in dcn30_populate_dml_writeback_from_context()
1595 struct display_mode_lib *dml = &context->bw_ctx.dml; in dcn30_set_mcif_arb_params()
1613 wb_arb_params = &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[dwb_pipe]; in dcn30_set_mcif_arb_params()
1873 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn30_internal_validate_bw()
1888 dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn30_internal_validate_bw()
1896 context->bw_ctx.dml.soc.allow_dram_self_refresh_or_dram_clock_change_in_vblank = in dcn30_internal_validate_bw()
1898 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn30_internal_validate_bw()
1900 if (vlevel < context->bw_ctx.dml.soc.num_states) in dcn30_internal_validate_bw()
1903 if (fast_validate || vlevel == context->bw_ctx.dml.soc.num_states || in dcn30_internal_validate_bw()
1912 context->bw_ctx.dml.soc.allow_dram_self_refresh_or_dram_clock_change_in_vblank = in dcn30_internal_validate_bw()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_debug.c | 352 context->bw_ctx.bw.dcn.clk.dispclk_khz, in context_clock_trace()
353 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
354 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
355 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in context_clock_trace()
356 context->bw_ctx.bw.dcn.clk.fclk_khz, in context_clock_trace()
357 context->bw_ctx.bw.dcn.clk.socclk_khz); in context_clock_trace()
360 context->bw_ctx.bw.dcn.clk.dispclk_khz, in context_clock_trace()
361 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
362 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
363 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in context_clock_trace()
[all …]
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| D | dc.c | 1676 TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); in dc_commit_state_no_check()
1678 TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce); in dc_commit_state_no_check()
1809 memcpy(&context->bw_ctx.dml, &dc->dml, sizeof(struct display_mode_lib)); in init_state()
2268 …if (!dc->clk_mgr->funcs->are_clock_states_equal(&dc->clk_mgr->clks, &dc->current_state->bw_ctx.bw.… in dc_check_update_surfaces_for_stream()
2271 …} else if (memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_cl… in dc_check_update_surfaces_for_stream()
3032 TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); in dc_commit_updates_for_stream()
3034 TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce); in dc_commit_updates_for_stream()
3142 memcpy(dml, &dc->current_state->bw_ctx.dml, sizeof(struct display_mode_lib)); in dc_set_power_state()
3149 dc->current_state->bw_ctx.dml = *dml; in dc_set_power_state()
3311 info->displayClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dispclk_khz; in get_clock_requirements_for_state()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 902 &context->bw_ctx.bw.dce)) in dce112_validate_bandwidth()
910 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce112_validate_bandwidth()
911 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce112_validate_bandwidth()
925 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].b_mark, in dce112_validate_bandwidth()
926 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].a_mark, in dce112_validate_bandwidth()
927 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce112_validate_bandwidth()
928 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce112_validate_bandwidth()
929 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].b_mark, in dce112_validate_bandwidth()
930 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].a_mark, in dce112_validate_bandwidth()
931 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[1].b_mark, in dce112_validate_bandwidth()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| D | dce110_clk_mgr.c | 183 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
185 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
187 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
189 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
191 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
205 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
211 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
224 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
255 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce11_update_clocks()
270 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce11_update_clocks()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 564 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns =
566 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns =
568 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns =
570 context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000;
571 context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = v->urgent_watermark * 1000;
578 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_exit_ns =
580 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns =
582 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.pstate_change_ns =
584 context->bw_ctx.bw.dcn.watermarks.c.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000;
585 context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = v->urgent_watermark * 1000;
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 980 &context->bw_ctx.bw.dce)) in dce110_validate_bandwidth()
990 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce110_validate_bandwidth()
991 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce110_validate_bandwidth()
1005 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].b_mark, in dce110_validate_bandwidth()
1006 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].a_mark, in dce110_validate_bandwidth()
1007 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce110_validate_bandwidth()
1008 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce110_validate_bandwidth()
1009 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].b_mark, in dce110_validate_bandwidth()
1010 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].a_mark, in dce110_validate_bandwidth()
1011 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[1].b_mark, in dce110_validate_bandwidth()
[all …]
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| D | dce110_hw_sequencer.c | 1790 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[num_pipes], in dce110_set_displaymarks()
1791 context->bw_ctx.bw.dce.stutter_exit_wm_ns[num_pipes], in dce110_set_displaymarks()
1792 context->bw_ctx.bw.dce.stutter_entry_wm_ns[num_pipes], in dce110_set_displaymarks()
1793 context->bw_ctx.bw.dce.urgent_wm_ns[num_pipes], in dce110_set_displaymarks()
1799 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[num_pipes], in dce110_set_displaymarks()
1800 context->bw_ctx.bw.dce.stutter_exit_wm_ns[num_pipes], in dce110_set_displaymarks()
1801 context->bw_ctx.bw.dce.urgent_wm_ns[num_pipes], in dce110_set_displaymarks()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_clk_mgr.c | 227 if (context->bw_ctx.bw.dce.dispclk_khz > in dce_get_required_clocks_state()
237 < context->bw_ctx.bw.dce.dispclk_khz) in dce_get_required_clocks_state()
617 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
619 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
621 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
623 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
625 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
627 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
632 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
645 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 1111 patch_bounding_box(dc, &context->bw_ctx.dml.soc); in dcn21_calculate_wm()
1118 …ipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel_req][context-… in dcn21_calculate_wm()
1122 … context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn21_calculate_wm()
1123 if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_idx] == pipe_idx) in dcn21_calculate_wm()
1125 context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_idx]; in dcn21_calculate_wm()
1131 …context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_… in dcn21_calculate_wm()
1132 if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_split_from[i]] == pipe_split_from[i]) in dcn21_calculate_wm()
1134 context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_split_from[i]]; in dcn21_calculate_wm()
1161 calculate_wm_set_for_vlevel(vlevel, table_entry, &context->bw_ctx.bw.dcn.watermarks.d, in dcn21_calculate_wm()
1162 &context->bw_ctx.dml, pipes, pipe_cnt); in dcn21_calculate_wm()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| D | dcn20_clk_mgr.c | 212 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks()
340 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks_fpga()
448 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz; in dcn2_get_clock()
451 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dispclk_khz; in dcn2_get_clock()
454 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in dcn2_get_clock()
457 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dppclk_khz; in dcn2_get_clock()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer_debug.c | 475 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_get_clock_states()
476 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_get_clock_states()
477 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz, in dcn10_get_clock_states()
478 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
479 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_get_clock_states()
480 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_get_clock_states()
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| D | dcn10_hw_sequencer.c | 459 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()
460 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_log_hw_state()
461 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz, in dcn10_log_hw_state()
462 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
463 dc->current_state->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz, in dcn10_log_hw_state()
464 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_log_hw_state()
465 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_log_hw_state()
2578 if (context->bw_ctx.bw.dcn.clk.dispclk_khz < in dcn10_update_dchubp_dpp()
2583 context->bw_ctx.bw.dcn.clk.dppclk_khz <= in dcn10_update_dchubp_dpp()
2901 context->bw_ctx.bw.dcn.clk.phyclk_khz = 0; in dcn10_prepare_bandwidth()
[all …]
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| D | dce_clk_mgr.c | 208 if (context->bw_ctx.bw.dce.dispclk_khz > in dce_get_required_clocks_state()
218 < context->bw_ctx.bw.dce.dispclk_khz) in dce_get_required_clocks_state()
401 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce_update_clocks()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| D | dce120_clk_mgr.c | 91 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce12_update_clocks()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| D | dce60_clk_mgr.c | 126 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce60_update_clocks()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce100/ |
| D | dce100_resource.c | 851 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce100_validate_bandwidth()
852 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce100_validate_bandwidth()
854 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce100_validate_bandwidth()
855 context->bw_ctx.bw.dce.yclk_khz = 0; in dce100_validate_bandwidth()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| D | dce112_clk_mgr.c | 201 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce112_update_clocks()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_resource.c | 880 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce60_validate_bandwidth()
881 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce60_validate_bandwidth()
883 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce60_validate_bandwidth()
884 context->bw_ctx.bw.dce.yclk_khz = 0; in dce60_validate_bandwidth()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_resource.c | 885 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce80_validate_bandwidth()
886 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce80_validate_bandwidth()
888 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce80_validate_bandwidth()
889 context->bw_ctx.bw.dce.yclk_khz = 0; in dce80_validate_bandwidth()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr.c | 197 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rv1_update_clocks()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 452 struct bw_context bw_ctx; member
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | vg_clk_mgr.c | 97 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in vg_update_clocks()
179 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in vg_update_clocks()
|
