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Searched refs:GCC_UFS_PHY_BCR (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.15/include/dt-bindings/clock/
Dqcom,gcc-sc7180.h146 #define GCC_UFS_PHY_BCR 2 macro
Dqcom,gcc-sm6350.h163 #define GCC_UFS_PHY_BCR 4 macro
Dqcom,gcc-sm6115.h180 #define GCC_UFS_PHY_BCR 3 macro
Dqcom,gcc-sc7280.h218 #define GCC_UFS_PHY_BCR 9 macro
Dqcom,gcc-sm6125.h233 #define GCC_UFS_PHY_BCR 2 macro
Dqcom,gcc-sdm845.h218 #define GCC_UFS_PHY_BCR 14 macro
Dqcom,gcc-sm8150.h238 #define GCC_UFS_PHY_BCR 25 macro
Dqcom,gcc-sm8250.h245 #define GCC_UFS_PHY_BCR 33 macro
Dqcom,gcc-sm8350.h240 #define GCC_UFS_PHY_BCR 25 macro
Dqcom,gcc-sc8180x.h286 #define GCC_UFS_PHY_BCR 36 macro
/Linux-v5.15/drivers/clk/qcom/
Dgcc-sc7180.c2393 [GCC_UFS_PHY_BCR] = { 0x77000 },
Dgcc-sm6350.c2497 [GCC_UFS_PHY_BCR] = { 0x3a000 },
Dgcc-sc7280.c3501 [GCC_UFS_PHY_BCR] = { 0x77000 },
Dgcc-sm6115.c3445 [GCC_UFS_PHY_BCR] = { 0x45000 },
Dgcc-sdm845.c3522 [GCC_UFS_PHY_BCR] = { 0x77000 },
Dgcc-sm8250.c3570 [GCC_UFS_PHY_BCR] = { 0x77000 },
Dgcc-sm8350.c3771 [GCC_UFS_PHY_BCR] = { 0x77000 },
Dgcc-sm8150.c3710 [GCC_UFS_PHY_BCR] = { 0x77000 },
Dgcc-sm6125.c4088 [GCC_UFS_PHY_BCR] = { 0x45000 },
Dgcc-sc8180x.c4527 [GCC_UFS_PHY_BCR] = { 0x77000 },
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsm8350.dtsi1028 resets = <&gcc GCC_UFS_PHY_BCR>;
Dsm8150.dtsi1641 resets = <&gcc GCC_UFS_PHY_BCR>;
Dsm8250.dtsi1700 resets = <&gcc GCC_UFS_PHY_BCR>;
Dsdm845.dtsi2251 resets = <&gcc GCC_UFS_PHY_BCR>;