Searched refs:IMX6QDL_CLK_PLL5_VIDEO_DIV (Results 1 – 6 of 6) sorted by relevance
| /Linux-v5.10/arch/arm/boot/dts/ |
| D | imx6q-logicpd.dts | 65 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
66 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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| D | imx6q-bx50v3.dtsi | 403 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
404 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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| D | imx6dl-prtvt7.dts | 218 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
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| D | imx6qdl-zii-rdu2.dtsi | 222 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
223 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
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| /Linux-v5.10/drivers/clk/imx/ |
| D | clk-imx6q.c | 153 case IMX6QDL_CLK_PLL5_VIDEO_DIV: in ldb_di_sel_by_clock_id()
607 …hws[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post… in imx6q_clocks_init()
929 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
930 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
931 clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
932 clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()
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| /Linux-v5.10/include/dt-bindings/clock/ |
| D | imx6qdl-clock.h | 205 #define IMX6QDL_CLK_PLL5_VIDEO_DIV 195 macro
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