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Searched refs:sseu (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_device_info.c82 static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p) in sseu_dump() argument
87 hweight8(sseu->slice_mask), sseu->slice_mask); in sseu_dump()
88 drm_printf(p, "subslice total: %u\n", sseu_subslice_total(sseu)); in sseu_dump()
89 for (s = 0; s < sseu->max_slices; s++) { in sseu_dump()
91 s, hweight8(sseu->subslice_mask[s]), in sseu_dump()
92 sseu->subslice_mask[s]); in sseu_dump()
94 drm_printf(p, "EU total: %u\n", sseu->eu_total); in sseu_dump()
95 drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice); in sseu_dump()
97 yesno(sseu->has_slice_pg)); in sseu_dump()
99 yesno(sseu->has_subslice_pg)); in sseu_dump()
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Di915_query.c16 const struct sseu_dev_info *sseu = &INTEL_INFO(dev_priv)->sseu; in query_topology_info() local
23 if (sseu->max_slices == 0) in query_topology_info()
26 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in query_topology_info()
28 slice_length = sizeof(sseu->slice_mask); in query_topology_info()
29 subslice_length = sseu->max_slices * in query_topology_info()
30 DIV_ROUND_UP(sseu->max_subslices, in query_topology_info()
31 sizeof(sseu->subslice_mask[0]) * BITS_PER_BYTE); in query_topology_info()
32 eu_length = sseu->max_slices * sseu->max_subslices * in query_topology_info()
33 DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE); in query_topology_info()
55 topo.max_slices = sseu->max_slices; in query_topology_info()
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Dintel_device_info.h177 struct sseu_dev_info sseu; member
192 static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu) in sseu_subslice_total() argument
196 for (i = 0; i < ARRAY_SIZE(sseu->subslice_mask); i++) in sseu_subslice_total()
197 total += hweight8(sseu->subslice_mask[i]); in sseu_subslice_total()
202 static inline int sseu_eu_idx(const struct sseu_dev_info *sseu, in sseu_eu_idx() argument
205 int subslice_stride = DIV_ROUND_UP(sseu->max_eus_per_subslice, in sseu_eu_idx()
207 int slice_stride = sseu->max_subslices * subslice_stride; in sseu_eu_idx()
212 static inline u16 sseu_get_eus(const struct sseu_dev_info *sseu, in sseu_get_eus() argument
215 int i, offset = sseu_eu_idx(sseu, slice, subslice); in sseu_get_eus()
219 i < DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE); i++) { in sseu_get_eus()
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Di915_debugfs.c3272 intel_device_info_dump_topology(&INTEL_INFO(dev_priv)->sseu, &p); in i915_rcs_topology()
4240 struct sseu_dev_info *sseu) in cherryview_sseu_device_status() argument
4259 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
4260 sseu->subslice_mask[0] |= BIT(ss); in cherryview_sseu_device_status()
4265 sseu->eu_total += eu_cnt; in cherryview_sseu_device_status()
4266 sseu->eu_per_subslice = max_t(unsigned int, in cherryview_sseu_device_status()
4267 sseu->eu_per_subslice, eu_cnt); in cherryview_sseu_device_status()
4273 struct sseu_dev_info *sseu) in gen10_sseu_device_status() argument
4280 for (s = 0; s < info->sseu.max_slices; s++) { in gen10_sseu_device_status()
4302 for (s = 0; s < info->sseu.max_slices; s++) { in gen10_sseu_device_status()
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Dintel_workarounds.c321 if (!is_power_of_2(INTEL_INFO(dev_priv)->sseu.subslice_7eu[i])) in skl_tune_iz_hashing()
330 ss = ffs(INTEL_INFO(dev_priv)->sseu.subslice_7eu[i]) - 1; in skl_tune_iz_hashing()
735 const struct sseu_dev_info *sseu = &(INTEL_INFO(dev_priv)->sseu); in wa_init_mcr() local
753 is_power_of_2(sseu->slice_mask)) { in wa_init_mcr()
758 u32 slice = fls(sseu->slice_mask); in wa_init_mcr()
760 u8 ss_mask = sseu->subslice_mask[slice]; in wa_init_mcr()
Dintel_lrc.c2512 if (INTEL_INFO(dev_priv)->sseu.has_slice_pg) { in make_rpcs()
2514 rpcs |= hweight8(INTEL_INFO(dev_priv)->sseu.slice_mask) << in make_rpcs()
2519 if (INTEL_INFO(dev_priv)->sseu.has_subslice_pg) { in make_rpcs()
2521 rpcs |= hweight8(INTEL_INFO(dev_priv)->sseu.subslice_mask[0]) << in make_rpcs()
2526 if (INTEL_INFO(dev_priv)->sseu.has_eu_pg) { in make_rpcs()
2527 rpcs |= INTEL_INFO(dev_priv)->sseu.eu_per_subslice << in make_rpcs()
2529 rpcs |= INTEL_INFO(dev_priv)->sseu.eu_per_subslice << in make_rpcs()
Dintel_engine_cs.c816 const struct sseu_dev_info *sseu = &(INTEL_INFO(dev_priv)->sseu); in intel_calculate_mcr_s_ss_select() local
818 u32 slice = fls(sseu->slice_mask); in intel_calculate_mcr_s_ss_select()
819 u32 subslice = fls(sseu->subslice_mask[slice]); in intel_calculate_mcr_s_ss_select()
Dintel_ringbuffer.h95 1 : INTEL_INFO(dev_priv__)->sseu.slice_mask)
99 1 : INTEL_INFO(dev_priv__)->sseu.subslice_mask[0])
Di915_drv.c360 value = sseu_subslice_total(&INTEL_INFO(dev_priv)->sseu); in i915_getparam_ioctl()
365 value = INTEL_INFO(dev_priv)->sseu.eu_total; in i915_getparam_ioctl()
382 value = INTEL_INFO(dev_priv)->sseu.min_eu_in_pool; in i915_getparam_ioctl()
432 value = INTEL_INFO(dev_priv)->sseu.slice_mask; in i915_getparam_ioctl()
437 value = INTEL_INFO(dev_priv)->sseu.subslice_mask[0]; in i915_getparam_ioctl()
Di915_gpu_error.c600 intel_device_info_dump_topology(&info->sseu, &p); in err_print_capabilities()
Dintel_pm.c7191 switch (INTEL_INFO(dev_priv)->sseu.eu_total) { in cherryview_rps_max_freq()