82 static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p)  in sseu_dump()  argument
87 		   hweight8(sseu->slice_mask), sseu->slice_mask);  in sseu_dump()
88 	drm_printf(p, "subslice total: %u\n", sseu_subslice_total(sseu));  in sseu_dump()
89 	for (s = 0; s < sseu->max_slices; s++) {  in sseu_dump()
91 			   s, hweight8(sseu->subslice_mask[s]),  in sseu_dump()
92 			   sseu->subslice_mask[s]);  in sseu_dump()
94 	drm_printf(p, "EU total: %u\n", sseu->eu_total);  in sseu_dump()
95 	drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice);  in sseu_dump()
97 		   yesno(sseu->has_slice_pg));  in sseu_dump()
99 		   yesno(sseu->has_subslice_pg));  in sseu_dump()
100 	drm_printf(p, "has EU power gating: %s\n", yesno(sseu->has_eu_pg));  in sseu_dump()
106 	sseu_dump(&info->sseu, p);  in intel_device_info_dump_runtime()
127 void intel_device_info_dump_topology(const struct sseu_dev_info *sseu,  in intel_device_info_dump_topology()  argument
132 	if (sseu->max_slices == 0) {  in intel_device_info_dump_topology()
137 	for (s = 0; s < sseu->max_slices; s++) {  in intel_device_info_dump_topology()
139 			   s, hweight8(sseu->subslice_mask[s]),  in intel_device_info_dump_topology()
140 			   sseu->subslice_mask[s]);  in intel_device_info_dump_topology()
142 		for (ss = 0; ss < sseu->max_subslices; ss++) {  in intel_device_info_dump_topology()
143 			u16 enabled_eus = sseu_get_eus(sseu, s, ss);  in intel_device_info_dump_topology()
151 static u16 compute_eu_total(const struct sseu_dev_info *sseu)  in compute_eu_total()  argument
155 	for (i = 0; i < ARRAY_SIZE(sseu->eu_mask); i++)  in compute_eu_total()
156 		total += hweight8(sseu->eu_mask[i]);  in compute_eu_total()
163 	struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;  in gen11_sseu_info_init()  local
169 	sseu->max_slices = 1;  in gen11_sseu_info_init()
170 	sseu->max_subslices = 8;  in gen11_sseu_info_init()
171 	sseu->max_eus_per_subslice = 8;  in gen11_sseu_info_init()
175 	ss_en_mask = BIT(sseu->max_subslices) - 1;  in gen11_sseu_info_init()
178 	for (s = 0; s < sseu->max_slices; s++) {  in gen11_sseu_info_init()
180 			int ss_idx = sseu->max_subslices * s;  in gen11_sseu_info_init()
183 			sseu->slice_mask |= BIT(s);  in gen11_sseu_info_init()
184 			sseu->subslice_mask[s] = (ss_en >> ss_idx) & ss_en_mask;  in gen11_sseu_info_init()
185 			for (ss = 0; ss < sseu->max_subslices; ss++) {  in gen11_sseu_info_init()
186 				if (sseu->subslice_mask[s] & BIT(ss))  in gen11_sseu_info_init()
187 					sseu_set_eus(sseu, s, ss, eu_en);  in gen11_sseu_info_init()
191 	sseu->eu_per_subslice = hweight8(eu_en);  in gen11_sseu_info_init()
192 	sseu->eu_total = compute_eu_total(sseu);  in gen11_sseu_info_init()
195 	sseu->has_slice_pg = 1;  in gen11_sseu_info_init()
196 	sseu->has_subslice_pg = 1;  in gen11_sseu_info_init()
197 	sseu->has_eu_pg = 1;  in gen11_sseu_info_init()
202 	struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;  in gen10_sseu_info_init()  local
208 	sseu->slice_mask = (fuse2 & GEN10_F2_S_ENA_MASK) >>  in gen10_sseu_info_init()
210 	sseu->max_slices = 6;  in gen10_sseu_info_init()
211 	sseu->max_subslices = 4;  in gen10_sseu_info_init()
212 	sseu->max_eus_per_subslice = 8;  in gen10_sseu_info_init()
222 	sseu->subslice_mask[0] = subslice_mask;  in gen10_sseu_info_init()
223 	for (s = 1; s < sseu->max_slices; s++)  in gen10_sseu_info_init()
224 		sseu->subslice_mask[s] = subslice_mask & 0x3;  in gen10_sseu_info_init()
228 	for (ss = 0; ss < sseu->max_subslices; ss++)  in gen10_sseu_info_init()
229 		sseu_set_eus(sseu, 0, ss, (eu_en >> (8 * ss)) & eu_mask);  in gen10_sseu_info_init()
231 	sseu_set_eus(sseu, 1, 0, (eu_en >> 24) & eu_mask);  in gen10_sseu_info_init()
233 	sseu_set_eus(sseu, 1, 1, eu_en & eu_mask);  in gen10_sseu_info_init()
235 	sseu_set_eus(sseu, 2, 0, (eu_en >> 8) & eu_mask);  in gen10_sseu_info_init()
236 	sseu_set_eus(sseu, 2, 1, (eu_en >> 16) & eu_mask);  in gen10_sseu_info_init()
238 	sseu_set_eus(sseu, 3, 0, (eu_en >> 24) & eu_mask);  in gen10_sseu_info_init()
240 	sseu_set_eus(sseu, 3, 1, eu_en & eu_mask);  in gen10_sseu_info_init()
242 	sseu_set_eus(sseu, 4, 0, (eu_en >> 8) & eu_mask);  in gen10_sseu_info_init()
243 	sseu_set_eus(sseu, 4, 1, (eu_en >> 16) & eu_mask);  in gen10_sseu_info_init()
245 	sseu_set_eus(sseu, 5, 0, (eu_en >> 24) & eu_mask);  in gen10_sseu_info_init()
247 	sseu_set_eus(sseu, 5, 1, eu_en & eu_mask);  in gen10_sseu_info_init()
252 	for (s = 0; s < sseu->max_slices; s++) {  in gen10_sseu_info_init()
253 		for (ss = 0; ss < sseu->max_subslices; ss++) {  in gen10_sseu_info_init()
254 			if (sseu_get_eus(sseu, s, ss) == 0)  in gen10_sseu_info_init()
255 				sseu->subslice_mask[s] &= ~BIT(ss);  in gen10_sseu_info_init()
259 	sseu->eu_total = compute_eu_total(sseu);  in gen10_sseu_info_init()
267 	sseu->eu_per_subslice = sseu_subslice_total(sseu) ?  in gen10_sseu_info_init()
268 				DIV_ROUND_UP(sseu->eu_total,  in gen10_sseu_info_init()
269 					     sseu_subslice_total(sseu)) : 0;  in gen10_sseu_info_init()
272 	sseu->has_slice_pg = 1;  in gen10_sseu_info_init()
273 	sseu->has_subslice_pg = 1;  in gen10_sseu_info_init()
274 	sseu->has_eu_pg = 1;  in gen10_sseu_info_init()
279 	struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;  in cherryview_sseu_info_init()  local
284 	sseu->slice_mask = BIT(0);  in cherryview_sseu_info_init()
285 	sseu->max_slices = 1;  in cherryview_sseu_info_init()
286 	sseu->max_subslices = 2;  in cherryview_sseu_info_init()
287 	sseu->max_eus_per_subslice = 8;  in cherryview_sseu_info_init()
296 		sseu->subslice_mask[0] |= BIT(0);  in cherryview_sseu_info_init()
297 		sseu_set_eus(sseu, 0, 0, ~disabled_mask);  in cherryview_sseu_info_init()
307 		sseu->subslice_mask[0] |= BIT(1);  in cherryview_sseu_info_init()
308 		sseu_set_eus(sseu, 0, 1, ~disabled_mask);  in cherryview_sseu_info_init()
311 	sseu->eu_total = compute_eu_total(sseu);  in cherryview_sseu_info_init()
317 	sseu->eu_per_subslice = sseu_subslice_total(sseu) ?  in cherryview_sseu_info_init()
318 				sseu->eu_total / sseu_subslice_total(sseu) :  in cherryview_sseu_info_init()
325 	sseu->has_slice_pg = 0;  in cherryview_sseu_info_init()
326 	sseu->has_subslice_pg = sseu_subslice_total(sseu) > 1;  in cherryview_sseu_info_init()
327 	sseu->has_eu_pg = (sseu->eu_per_subslice > 2);  in cherryview_sseu_info_init()
333 	struct sseu_dev_info *sseu = &info->sseu;  in gen9_sseu_info_init()  local
339 	sseu->slice_mask = (fuse2 & GEN8_F2_S_ENA_MASK) >> GEN8_F2_S_ENA_SHIFT;  in gen9_sseu_info_init()
342 	sseu->max_slices = IS_GEN9_LP(dev_priv) ? 1 : 3;  in gen9_sseu_info_init()
343 	sseu->max_subslices = IS_GEN9_LP(dev_priv) ? 3 : 4;  in gen9_sseu_info_init()
344 	sseu->max_eus_per_subslice = 8;  in gen9_sseu_info_init()
350 	subslice_mask = (1 << sseu->max_subslices) - 1;  in gen9_sseu_info_init()
358 	for (s = 0; s < sseu->max_slices; s++) {  in gen9_sseu_info_init()
359 		if (!(sseu->slice_mask & BIT(s)))  in gen9_sseu_info_init()
363 		sseu->subslice_mask[s] = subslice_mask;  in gen9_sseu_info_init()
366 		for (ss = 0; ss < sseu->max_subslices; ss++) {  in gen9_sseu_info_init()
370 			if (!(sseu->subslice_mask[s] & BIT(ss)))  in gen9_sseu_info_init()
376 			sseu_set_eus(sseu, s, ss, ~eu_disabled_mask);  in gen9_sseu_info_init()
378 			eu_per_ss = sseu->max_eus_per_subslice -  in gen9_sseu_info_init()
387 				sseu->subslice_7eu[s] |= BIT(ss);  in gen9_sseu_info_init()
391 	sseu->eu_total = compute_eu_total(sseu);  in gen9_sseu_info_init()
400 	sseu->eu_per_subslice = sseu_subslice_total(sseu) ?  in gen9_sseu_info_init()
401 				DIV_ROUND_UP(sseu->eu_total,  in gen9_sseu_info_init()
402 					     sseu_subslice_total(sseu)) : 0;  in gen9_sseu_info_init()
411 	sseu->has_slice_pg =  in gen9_sseu_info_init()
412 		!IS_GEN9_LP(dev_priv) && hweight8(sseu->slice_mask) > 1;  in gen9_sseu_info_init()
413 	sseu->has_subslice_pg =  in gen9_sseu_info_init()
414 		IS_GEN9_LP(dev_priv) && sseu_subslice_total(sseu) > 1;  in gen9_sseu_info_init()
415 	sseu->has_eu_pg = sseu->eu_per_subslice > 2;  in gen9_sseu_info_init()
418 #define IS_SS_DISABLED(ss)	(!(sseu->subslice_mask[0] & BIT(ss)))  in gen9_sseu_info_init()
419 		info->has_pooled_eu = hweight8(sseu->subslice_mask[0]) == 3;  in gen9_sseu_info_init()
421 		sseu->min_eu_in_pool = 0;  in gen9_sseu_info_init()
424 				sseu->min_eu_in_pool = 3;  in gen9_sseu_info_init()
426 				sseu->min_eu_in_pool = 6;  in gen9_sseu_info_init()
428 				sseu->min_eu_in_pool = 9;  in gen9_sseu_info_init()
436 	struct sseu_dev_info *sseu = &mkwrite_device_info(dev_priv)->sseu;  in broadwell_sseu_info_init()  local
441 	sseu->slice_mask = (fuse2 & GEN8_F2_S_ENA_MASK) >> GEN8_F2_S_ENA_SHIFT;  in broadwell_sseu_info_init()
442 	sseu->max_slices = 3;  in broadwell_sseu_info_init()
443 	sseu->max_subslices = 3;  in broadwell_sseu_info_init()
444 	sseu->max_eus_per_subslice = 8;  in broadwell_sseu_info_init()
450 	subslice_mask = GENMASK(sseu->max_subslices - 1, 0);  in broadwell_sseu_info_init()
466 	for (s = 0; s < sseu->max_slices; s++) {  in broadwell_sseu_info_init()
467 		if (!(sseu->slice_mask & BIT(s)))  in broadwell_sseu_info_init()
471 		sseu->subslice_mask[s] = subslice_mask;  in broadwell_sseu_info_init()
473 		for (ss = 0; ss < sseu->max_subslices; ss++) {  in broadwell_sseu_info_init()
477 			if (!(sseu->subslice_mask[ss] & BIT(ss)))  in broadwell_sseu_info_init()
482 				eu_disable[s] >> (ss * sseu->max_eus_per_subslice);  in broadwell_sseu_info_init()
484 			sseu_set_eus(sseu, s, ss, ~eu_disabled_mask);  in broadwell_sseu_info_init()
491 			if (sseu->max_eus_per_subslice - n_disabled == 7)  in broadwell_sseu_info_init()
492 				sseu->subslice_7eu[s] |= 1 << ss;  in broadwell_sseu_info_init()
496 	sseu->eu_total = compute_eu_total(sseu);  in broadwell_sseu_info_init()
503 	sseu->eu_per_subslice = sseu_subslice_total(sseu) ?  in broadwell_sseu_info_init()
504 				DIV_ROUND_UP(sseu->eu_total,  in broadwell_sseu_info_init()
505 					     sseu_subslice_total(sseu)) : 0;  in broadwell_sseu_info_init()
511 	sseu->has_slice_pg = hweight8(sseu->slice_mask) > 1;  in broadwell_sseu_info_init()
512 	sseu->has_subslice_pg = 0;  in broadwell_sseu_info_init()
513 	sseu->has_eu_pg = 0;  in broadwell_sseu_info_init()
519 	struct sseu_dev_info *sseu = &info->sseu;  in haswell_sseu_info_init()  local
532 		sseu->slice_mask = BIT(0);  in haswell_sseu_info_init()
533 		sseu->subslice_mask[0] = BIT(0);  in haswell_sseu_info_init()
536 		sseu->slice_mask = BIT(0);  in haswell_sseu_info_init()
537 		sseu->subslice_mask[0] = BIT(0) | BIT(1);  in haswell_sseu_info_init()
540 		sseu->slice_mask = BIT(0) | BIT(1);  in haswell_sseu_info_init()
541 		sseu->subslice_mask[0] = BIT(0) | BIT(1);  in haswell_sseu_info_init()
542 		sseu->subslice_mask[1] = BIT(0) | BIT(1);  in haswell_sseu_info_init()
546 	sseu->max_slices = hweight8(sseu->slice_mask);  in haswell_sseu_info_init()
547 	sseu->max_subslices = hweight8(sseu->subslice_mask[0]);  in haswell_sseu_info_init()
556 		sseu->eu_per_subslice = 10;  in haswell_sseu_info_init()
559 		sseu->eu_per_subslice = 8;  in haswell_sseu_info_init()
562 		sseu->eu_per_subslice = 6;  in haswell_sseu_info_init()
565 	sseu->max_eus_per_subslice = sseu->eu_per_subslice;  in haswell_sseu_info_init()
567 	for (s = 0; s < sseu->max_slices; s++) {  in haswell_sseu_info_init()
568 		for (ss = 0; ss < sseu->max_subslices; ss++) {  in haswell_sseu_info_init()
569 			sseu_set_eus(sseu, s, ss,  in haswell_sseu_info_init()
570 				     (1UL << sseu->eu_per_subslice) - 1);  in haswell_sseu_info_init()
574 	sseu->eu_total = compute_eu_total(sseu);  in haswell_sseu_info_init()
577 	sseu->has_slice_pg = 0;  in haswell_sseu_info_init()
578 	sseu->has_subslice_pg = 0;  in haswell_sseu_info_init()
579 	sseu->has_eu_pg = 0;  in haswell_sseu_info_init()