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Searched refs:reg_off (Results 1 – 25 of 36) sorted by relevance

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/Linux-v4.19/drivers/mmc/host/
Dcavium.h37 #define MIO_EMM_CFG(x) (0x00 + x->reg_off)
38 #define MIO_EMM_SWITCH(x) (0x48 + x->reg_off)
39 #define MIO_EMM_DMA(x) (0x50 + x->reg_off)
40 #define MIO_EMM_CMD(x) (0x58 + x->reg_off)
41 #define MIO_EMM_RSP_STS(x) (0x60 + x->reg_off)
42 #define MIO_EMM_RSP_LO(x) (0x68 + x->reg_off)
43 #define MIO_EMM_RSP_HI(x) (0x70 + x->reg_off)
44 #define MIO_EMM_INT(x) (0x78 + x->reg_off)
45 #define MIO_EMM_INT_EN(x) (0x80 + x->reg_off)
46 #define MIO_EMM_WDOG(x) (0x88 + x->reg_off)
[all …]
Dcavium-thunderx.c85 host->reg_off = 0x2000; in thunder_mmc_probe()
/Linux-v4.19/drivers/clk/meson/
Daxg.c28 .reg_off = HHI_MPLL_CNTL,
33 .reg_off = HHI_MPLL_CNTL,
38 .reg_off = HHI_MPLL_CNTL,
43 .reg_off = HHI_MPLL_CNTL2,
48 .reg_off = HHI_MPLL_CNTL,
53 .reg_off = HHI_MPLL_CNTL,
69 .reg_off = HHI_SYS_PLL_CNTL,
74 .reg_off = HHI_SYS_PLL_CNTL,
79 .reg_off = HHI_SYS_PLL_CNTL,
84 .reg_off = HHI_SYS_PLL_CNTL,
[all …]
Dmeson8b.c100 .reg_off = HHI_MPLL_CNTL,
105 .reg_off = HHI_MPLL_CNTL,
110 .reg_off = HHI_MPLL_CNTL,
115 .reg_off = HHI_MPLL_CNTL2,
120 .reg_off = HHI_MPLL_CNTL,
125 .reg_off = HHI_MPLL_CNTL,
142 .reg_off = HHI_VID_PLL_CNTL,
147 .reg_off = HHI_VID_PLL_CNTL,
152 .reg_off = HHI_VID_PLL_CNTL,
157 .reg_off = HHI_VID_PLL_CNTL,
[all …]
Dgxbb.c181 .reg_off = HHI_MPLL_CNTL,
186 .reg_off = HHI_MPLL_CNTL,
191 .reg_off = HHI_MPLL_CNTL,
196 .reg_off = HHI_MPLL_CNTL2,
201 .reg_off = HHI_MPLL_CNTL,
206 .reg_off = HHI_MPLL_CNTL,
234 .reg_off = HHI_HDMI_PLL_CNTL,
239 .reg_off = HHI_HDMI_PLL_CNTL,
244 .reg_off = HHI_HDMI_PLL_CNTL2,
249 .reg_off = HHI_HDMI_PLL_CNTL2,
[all …]
Dclkc.h25 u16 reg_off; member
34 regmap_read(map, p->reg_off, &val); in meson_parm_read()
41 regmap_update_bits(map, p->reg_off, SETPMASK(p->width, p->shift), in meson_parm_write()
Daxg-audio.c166 .reg_off = (_reg), \
171 .reg_off = (_reg), \
213 .reg_off = (_reg), \
218 .reg_off = (_reg), \
223 .reg_off = (_reg), \
320 .reg_off = (_reg), \
/Linux-v4.19/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_vbif.c68 u32 reg_off; in dpu_hw_set_mem_type() local
83 reg_off = VBIF_OUT_AXI_AMEMTYPE_CONF1; in dpu_hw_set_mem_type()
85 reg_off = VBIF_OUT_AXI_AMEMTYPE_CONF0; in dpu_hw_set_mem_type()
88 reg_val = DPU_REG_READ(c, reg_off); in dpu_hw_set_mem_type()
91 DPU_REG_WRITE(c, reg_off, reg_val); in dpu_hw_set_mem_type()
99 u32 reg_off; in dpu_hw_set_limit_conf() local
103 reg_off = VBIF_IN_RD_LIM_CONF0; in dpu_hw_set_limit_conf()
105 reg_off = VBIF_IN_WR_LIM_CONF0; in dpu_hw_set_limit_conf()
107 reg_off += (xin_id / 4) * 4; in dpu_hw_set_limit_conf()
109 reg_val = DPU_REG_READ(c, reg_off); in dpu_hw_set_limit_conf()
[all …]
Ddpu_hw_catalog.c76 .reg_off = 0x2AC, .bit_off = 0},
78 .reg_off = 0x2B4, .bit_off = 0},
80 .reg_off = 0x2BC, .bit_off = 0},
82 .reg_off = 0x2C4, .bit_off = 0},
84 .reg_off = 0x2AC, .bit_off = 8},
86 .reg_off = 0x2B4, .bit_off = 8},
88 .reg_off = 0x2BC, .bit_off = 8},
90 .reg_off = 0x2C4, .bit_off = 8},
Ddpu_hw_top.c122 u32 reg_off, bit_off; in dpu_hw_setup_clk_force_ctrl() local
134 reg_off = mdp->caps->clk_ctrls[clk_ctrl].reg_off; in dpu_hw_setup_clk_force_ctrl()
137 reg_val = DPU_REG_READ(c, reg_off); in dpu_hw_setup_clk_force_ctrl()
144 DPU_REG_WRITE(c, reg_off, new_val); in dpu_hw_setup_clk_force_ctrl()
Ddpu_hw_util.c74 u32 reg_off, in dpu_reg_write() argument
81 name, c->blk_off + reg_off, val); in dpu_reg_write()
82 writel_relaxed(val, c->base_off + c->blk_off + reg_off); in dpu_reg_write()
85 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off) in dpu_reg_read() argument
87 return readl_relaxed(c->base_off + c->blk_off + reg_off); in dpu_reg_read()
Ddpu_hw_util.h320 u32 reg_off,
323 int dpu_reg_read(struct dpu_hw_blk_reg_map *c, u32 reg_off);
/Linux-v4.19/drivers/pinctrl/
Dpinctrl-digicolor.c134 int bit_off, reg_off; in dc_set_mux() local
137 dc_client_sel(group, &reg_off, &bit_off); in dc_set_mux()
139 reg = readb_relaxed(pmap->regs + reg_off); in dc_set_mux()
142 writeb_relaxed(reg, pmap->regs + reg_off); in dc_set_mux()
152 int bit_off, reg_off; in dc_pmx_request_gpio() local
155 dc_client_sel(offset, &reg_off, &bit_off); in dc_pmx_request_gpio()
157 reg = readb_relaxed(pmap->regs + reg_off); in dc_pmx_request_gpio()
175 int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION); in dc_gpio_direction_input() local
181 drive = readb_relaxed(pmap->regs + reg_off); in dc_gpio_direction_input()
183 writeb_relaxed(drive, pmap->regs + reg_off); in dc_gpio_direction_input()
[all …]
/Linux-v4.19/drivers/pinctrl/spear/
Dpinctrl-plgpio.c83 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in is_plgpio_set() local
84 u32 val = readl_relaxed(reg_off); in is_plgpio_set()
92 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in plgpio_reg_set() local
93 u32 val = readl_relaxed(reg_off); in plgpio_reg_set()
95 writel_relaxed(val | (1 << offset), reg_off); in plgpio_reg_set()
101 void __iomem *reg_off = REG_OFFSET(base, reg, pin); in plgpio_reg_reset() local
102 u32 val = readl_relaxed(reg_off); in plgpio_reg_reset()
104 writel_relaxed(val & ~(1 << offset), reg_off); in plgpio_reg_reset()
323 void __iomem *reg_off; in plgpio_irq_set_type() local
340 reg_off = REG_OFFSET(plgpio->base, plgpio->regs.eit, offset); in plgpio_irq_set_type()
[all …]
/Linux-v4.19/drivers/thermal/samsung/
Dexynos_tmu.c463 unsigned int reg_off, j; in exynos5433_tmu_set_trip_temp() local
467 reg_off = EXYNOS5433_THD_TEMP_RISE7_4; in exynos5433_tmu_set_trip_temp()
470 reg_off = EXYNOS5433_THD_TEMP_RISE3_0; in exynos5433_tmu_set_trip_temp()
474 th = readl(data->base + reg_off); in exynos5433_tmu_set_trip_temp()
477 writel(th, data->base + reg_off); in exynos5433_tmu_set_trip_temp()
483 unsigned int reg_off, j; in exynos5433_tmu_set_trip_hyst() local
487 reg_off = EXYNOS5433_THD_TEMP_FALL7_4; in exynos5433_tmu_set_trip_hyst()
490 reg_off = EXYNOS5433_THD_TEMP_FALL3_0; in exynos5433_tmu_set_trip_hyst()
494 th = readl(data->base + reg_off); in exynos5433_tmu_set_trip_hyst()
497 writel(th, data->base + reg_off); in exynos5433_tmu_set_trip_hyst()
[all …]
/Linux-v4.19/drivers/net/ethernet/cavium/liquidio/
Docteon_device.h745 #define octeon_write_csr(oct_dev, reg_off, value) \ argument
746 writel(value, (oct_dev)->mmio[0].hw_addr + (reg_off))
748 #define octeon_write_csr64(oct_dev, reg_off, val64) \ argument
749 writeq(val64, (oct_dev)->mmio[0].hw_addr + (reg_off))
751 #define octeon_read_csr(oct_dev, reg_off) \ argument
752 readl((oct_dev)->mmio[0].hw_addr + (reg_off))
754 #define octeon_read_csr64(oct_dev, reg_off) \ argument
755 readq((oct_dev)->mmio[0].hw_addr + (reg_off))
/Linux-v4.19/drivers/staging/vt6656/
Dusbpipe.c68 void vnt_control_out_u8(struct vnt_private *priv, u8 reg, u8 reg_off, u8 data) in vnt_control_out_u8() argument
71 reg_off, reg, sizeof(u8), &data); in vnt_control_out_u8()
109 void vnt_control_in_u8(struct vnt_private *priv, u8 reg, u8 reg_off, u8 *data) in vnt_control_in_u8() argument
112 reg_off, reg, sizeof(u8), data); in vnt_control_in_u8()
Dusbpipe.h27 void vnt_control_in_u8(struct vnt_private *priv, u8 reg, u8 reg_off, u8 *data);
/Linux-v4.19/arch/x86/kvm/
Dlapic.h145 static inline u32 kvm_lapic_get_reg(struct kvm_lapic *apic, int reg_off) in kvm_lapic_get_reg() argument
147 return *((u32 *) (apic->regs + reg_off)); in kvm_lapic_get_reg()
150 static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val) in kvm_lapic_set_reg() argument
152 *((u32 *) (apic->regs + reg_off)) = val; in kvm_lapic_set_reg()
/Linux-v4.19/drivers/mtd/nand/raw/
Dqcom_nandc.c815 int reg_off, const void *vaddr, in prep_bam_dma_desc_cmd() argument
829 nandc_reg_phys(nandc, reg_off + 4 * i), in prep_bam_dma_desc_cmd()
835 nandc_reg_phys(nandc, reg_off + 4 * i), in prep_bam_dma_desc_cmd()
901 int reg_off, const void *vaddr, int size, in prep_adm_dma_desc() argument
938 slave_conf.src_addr = nandc->base_dma + reg_off; in prep_adm_dma_desc()
942 slave_conf.dst_addr = nandc->base_dma + reg_off; in prep_adm_dma_desc()
1054 static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off, in read_data_dma() argument
1060 return prep_adm_dma_desc(nandc, true, reg_off, vaddr, size, false); in read_data_dma()
1072 static int write_data_dma(struct qcom_nand_controller *nandc, int reg_off, in write_data_dma() argument
1078 return prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false); in write_data_dma()
[all …]
/Linux-v4.19/drivers/clk/
Dclk-stm32mp1.c329 u32 reg_off; member
340 u32 reg_off; member
348 u32 reg_off; member
391 gate_cfg->reg_off + base, in _clk_hw_register_gate()
422 div_cfg->reg_off + base, in _clk_hw_register_divider_table()
440 mux_cfg->reg_off + base, mux_cfg->shift, in _clk_hw_register_mux()
485 mmux->mux.reg = cfg->mux->reg_off + base; in _get_stm32_mux()
500 mux->reg = cfg->mux->reg_off + base; in _get_stm32_mux()
523 div->reg = cfg->div->reg_off + base; in _get_stm32_div()
546 mgate->gate.reg = cfg->gate->reg_off + base; in _get_stm32_gate()
[all …]
/Linux-v4.19/drivers/rtc/
Drtc-sh.c377 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off) in sh_rtc_read_alarm_value() argument
382 byte = readb(rtc->regbase + reg_off); in sh_rtc_read_alarm_value()
415 int value, int reg_off) in sh_rtc_write_alarm_value() argument
419 writeb(0, rtc->regbase + reg_off); in sh_rtc_write_alarm_value()
421 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off); in sh_rtc_write_alarm_value()
/Linux-v4.19/arch/x86/events/intel/
Dpt.c404 unsigned int reg_off; member
409 .reg_off = RTIT_CTL_ADDR0_OFFSET,
414 .reg_off = RTIT_CTL_ADDR1_OFFSET,
419 .reg_off = RTIT_CTL_ADDR2_OFFSET,
424 .reg_off = RTIT_CTL_ADDR3_OFFSET,
463 rtit_ctl |= filter->config << pt_address_ranges[range].reg_off; in pt_config_filters()
/Linux-v4.19/drivers/scsi/bnx2i/
Dbnx2i_hwi.c2717 u32 reg_off; in bnx2i_map_ep_dbell_regs() local
2728 reg_off = (1 << BNX2X_DB_SHIFT) * (cid_num & 0x1FFFF); in bnx2i_map_ep_dbell_regs()
2729 ep->qp.ctx_base = ioremap_nocache(reg_base + reg_off, 4); in bnx2i_map_ep_dbell_regs()
2741 reg_off = CTX_OFFSET + MAX_CID_CNT * MB_KERNEL_CTX_SIZE in bnx2i_map_ep_dbell_regs()
2745 reg_off = CTX_OFFSET + (MB_KERNEL_CTX_SIZE * cid_num); in bnx2i_map_ep_dbell_regs()
2748 reg_off = CTX_OFFSET + (MB_KERNEL_CTX_SIZE * cid_num); in bnx2i_map_ep_dbell_regs()
2750 ep->qp.ctx_base = ioremap_nocache(ep->hba->reg_base + reg_off, in bnx2i_map_ep_dbell_regs()
/Linux-v4.19/drivers/thermal/tegra/
Dsoctherm.c403 u32 r, reg_off; in throttrip_program() local
412 reg_off = THERMCTL_LVL_REG(sg->thermctl_lvl0_offset, throt + 1); in throttrip_program()
426 r = readl(ts->regs + reg_off); in throttrip_program()
432 writel(r, ts->regs + reg_off); in throttrip_program()

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