/Linux-v4.19/drivers/clk/imx/ |
D | clk-imx51-imx53.c | 325 void __iomem *pll_base; in mx50_clocks_init() local 328 pll_base = ioremap(MX53_DPLL1_BASE, SZ_16K); in mx50_clocks_init() 329 WARN_ON(!pll_base); in mx50_clocks_init() 330 clk[IMX5_CLK_PLL1_SW] = imx_clk_pllv2("pll1_sw", "osc", pll_base); in mx50_clocks_init() 332 pll_base = ioremap(MX53_DPLL2_BASE, SZ_16K); in mx50_clocks_init() 333 WARN_ON(!pll_base); in mx50_clocks_init() 334 clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base); in mx50_clocks_init() 336 pll_base = ioremap(MX53_DPLL3_BASE, SZ_16K); in mx50_clocks_init() 337 WARN_ON(!pll_base); in mx50_clocks_init() 338 clk[IMX5_CLK_PLL3_SW] = imx_clk_pllv2("pll3_sw", "osc", pll_base); in mx50_clocks_init() [all …]
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/Linux-v4.19/drivers/gpu/drm/omapdrm/dss/ |
D | video-pll.c | 150 void __iomem *pll_base, *clkctrl_base; in dss_video_pll_init() local 158 pll_base = devm_ioremap_resource(&pdev->dev, res); in dss_video_pll_init() 159 if (IS_ERR(pll_base)) in dss_video_pll_init() 160 return ERR_CAST(pll_base); in dss_video_pll_init() 191 pll->base = pll_base; in dss_video_pll_init()
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D | dsi.c | 334 void __iomem *pll_base; member 474 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg() 488 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg() 5223 pll->base = dsi->pll_base; in dsi_init_pll_data() 5350 dsi->pll_base = devm_ioremap_resource(dev, res); in dsi_bind() 5351 if (IS_ERR(dsi->pll_base)) in dsi_bind() 5352 return PTR_ERR(dsi->pll_base); in dsi_bind()
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/Linux-v4.19/drivers/video/fbdev/omap2/omapfb/dss/ |
D | video-pll.c | 140 void __iomem *pll_base, *clkctrl_base; in dss_video_pll_init() local 154 pll_base = devm_ioremap_resource(&pdev->dev, res); in dss_video_pll_init() 155 if (IS_ERR(pll_base)) { in dss_video_pll_init() 157 return ERR_CAST(pll_base); in dss_video_pll_init() 197 pll->base = pll_base; in dss_video_pll_init()
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D | dsi.c | 305 void __iomem *pll_base; member 451 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg() 467 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg() 5234 pll->base = dsi->pll_base; in dsi_init_pll_data() 5359 dsi->pll_base = devm_ioremap(&dsidev->dev, res->start, in dsi_bind() 5361 if (!dsi->pll_base) { in dsi_bind()
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/Linux-v4.19/arch/mips/ath79/ |
D | clock.c | 104 static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) in ar724x_clk_init() argument 109 pll = __raw_readl(pll_base + AR724X_PLL_REG_CPU_CONFIG); in ar724x_clk_init() 139 static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) in ar9330_clk_init() argument 150 clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG); in ar9330_clk_init() 163 cpu_config = __raw_readl(pll_base + AR933X_PLL_CPU_CONFIG_REG); in ar9330_clk_init() 682 void __iomem *pll_base; in ath79_clocks_init_dt_ng() local 690 pll_base = of_iomap(np, 0); in ath79_clocks_init_dt_ng() 691 if (!pll_base) { in ath79_clocks_init_dt_ng() 697 ar724x_clk_init(ref_clk, pll_base); in ath79_clocks_init_dt_ng() 699 ar9330_clk_init(ref_clk, pll_base); in ath79_clocks_init_dt_ng() [all …]
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/Linux-v4.19/Documentation/devicetree/bindings/display/msm/ |
D | edp.txt | 9 * "pll_base" 33 "pll_base";
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/Linux-v4.19/drivers/clk/st/ |
D | clkgen-pll.c | 711 void __iomem *pll_base; in clkgen_c32_pll_setup() local 721 pll_base = clkgen_get_register_base(np); in clkgen_c32_pll_setup() 722 if (!pll_base) in clkgen_c32_pll_setup() 727 clk = clkgen_pll_register(parent_name, data, pll_base, pll_flags, in clkgen_c32_pll_setup() 758 clk = clkgen_odf_register(pll_name, pll_base, data, odf_flags, in clkgen_c32_pll_setup()
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/Linux-v4.19/arch/arm/mach-tegra/ |
D | sleep-tegra30.S | 99 .macro pll_enable, rd, r_car_base, pll_base, pll_misc 100 ldr \rd, [\r_car_base, #\pll_base] 103 streq \rd, [\r_car_base, #\pll_base] 116 .macro pll_locked, rd, r_car_base, pll_base 118 ldr \rd, [\r_car_base, #\pll_base]
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D | sleep-tegra20.S | 57 .macro pll_enable, rd, r_car_base, pll_base 58 ldr \rd, [\r_car_base, #\pll_base] 61 streq \rd, [\r_car_base, #\pll_base]
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