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Searched refs:mdp5_write (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_encoder.c185 mdp5_write(mdp5_kms, REG_MDP5_INTF_HSYNC_CTL(intf), in mdp5_vid_encoder_mode_set()
188 mdp5_write(mdp5_kms, REG_MDP5_INTF_VSYNC_PERIOD_F0(intf), vsync_period); in mdp5_vid_encoder_mode_set()
189 mdp5_write(mdp5_kms, REG_MDP5_INTF_VSYNC_LEN_F0(intf), vsync_len); in mdp5_vid_encoder_mode_set()
190 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_HCTL(intf), in mdp5_vid_encoder_mode_set()
193 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_VSTART_F0(intf), display_v_start); in mdp5_vid_encoder_mode_set()
194 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_VEND_F0(intf), display_v_end); in mdp5_vid_encoder_mode_set()
195 mdp5_write(mdp5_kms, REG_MDP5_INTF_BORDER_COLOR(intf), 0); in mdp5_vid_encoder_mode_set()
196 mdp5_write(mdp5_kms, REG_MDP5_INTF_UNDERFLOW_COLOR(intf), 0xff); in mdp5_vid_encoder_mode_set()
197 mdp5_write(mdp5_kms, REG_MDP5_INTF_HSYNC_SKEW(intf), dtv_hsync_skew); in mdp5_vid_encoder_mode_set()
198 mdp5_write(mdp5_kms, REG_MDP5_INTF_POLARITY_CTL(intf), ctrl_pol); in mdp5_vid_encoder_mode_set()
[all …]
Dmdp5_cmd_encoder.c81 mdp5_write(mdp5_kms, REG_MDP5_PP_SYNC_CONFIG_VSYNC(pp_id), cfg); in pingpong_tearcheck_setup()
82 mdp5_write(mdp5_kms, in pingpong_tearcheck_setup()
84 mdp5_write(mdp5_kms, in pingpong_tearcheck_setup()
86 mdp5_write(mdp5_kms, REG_MDP5_PP_RD_PTR_IRQ(pp_id), mode->vdisplay + 1); in pingpong_tearcheck_setup()
87 mdp5_write(mdp5_kms, REG_MDP5_PP_START_POS(pp_id), mode->vdisplay); in pingpong_tearcheck_setup()
88 mdp5_write(mdp5_kms, REG_MDP5_PP_SYNC_THRESH(pp_id), in pingpong_tearcheck_setup()
116 mdp5_write(mdp5_kms, REG_MDP5_PP_TEAR_CHECK_EN(pp_id), 1); in pingpong_tearcheck_enable()
127 mdp5_write(mdp5_kms, REG_MDP5_PP_TEAR_CHECK_EN(pp_id), 0); in pingpong_tearcheck_disable()
222 mdp5_write(mdp5_kms, REG_MDP5_SPLIT_DPL_UPPER, data); in mdp5_cmd_encoder_set_split_display()
224 mdp5_write(mdp5_kms, REG_MDP5_SPLIT_DPL_LOWER, in mdp5_cmd_encoder_set_split_display()
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Dmdp5_plane.c546 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_A(pipe), in set_scanout_locked()
550 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_B(pipe), in set_scanout_locked()
554 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC0_ADDR(pipe), in set_scanout_locked()
556 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC1_ADDR(pipe), in set_scanout_locked()
558 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC2_ADDR(pipe), in set_scanout_locked()
560 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC3_ADDR(pipe), in set_scanout_locked()
570 mdp5_write(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe), value); in csc_disable()
588 mdp5_write(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe), mode); in csc_enable()
591 mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(pipe), in csc_enable()
594 mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(pipe), in csc_enable()
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Dmdp5_irq.c28 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_CLEAR, in mdp5_set_irqmask()
30 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_EN, irqmask); in mdp5_set_irqmask()
55 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff); in mdp5_irq_preinstall()
56 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000); in mdp5_irq_preinstall()
86 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000); in mdp5_irq_uninstall()
101 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, status); in mdp5_irq()
Dmdp5_crtc.c339 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_OP_MODE(lm, in blend_setup()
341 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_FG_ALPHA(lm, in blend_setup()
343 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_BG_ALPHA(lm, in blend_setup()
346 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_OP_MODE(r_lm, in blend_setup()
348 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_FG_ALPHA(r_lm, in blend_setup()
350 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_BG_ALPHA(r_lm, in blend_setup()
356 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_COLOR_OUT(lm), in blend_setup()
360 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_COLOR_OUT(r_lm), in blend_setup()
401 mdp5_write(mdp5_kms, REG_MDP5_LM_OUT_SIZE(lm), in mdp5_crtc_mode_set_nofb()
408 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_COLOR_OUT(lm), val); in mdp5_crtc_mode_set_nofb()
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Dmdp5_smp.c273 mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_W_REG(i), in write_smp_alloc_regs()
275 mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_R_REG(i), in write_smp_alloc_regs()
289 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_0(pipe), in write_smp_fifo_regs()
291 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_1(pipe), in write_smp_fifo_regs()
293 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_2(pipe), in write_smp_fifo_regs()
Dmdp5_ctl.c96 mdp5_write(mdp5_kms, reg, data); in ctl_write()
139 mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, intf_sel); in set_display_intf()
604 mdp5_write(mdp5_kms, REG_MDP5_SPARE_0, 0); in mdp5_ctl_pair()
617 mdp5_write(mdp5_kms, REG_MDP5_SPARE_0, in mdp5_ctl_pair()
Dmdp5_kms.c63 mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, 0); in mdp5_hw_init()
708 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(i), 0); in mdp5_kms_init()
710 mdp5_write(mdp5_kms, REG_MDP5_INTF_FRAME_LINE_COUNT_EN(i), 0x3); in mdp5_kms_init()
Dmdp5_kms.h181 static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data) in mdp5_write() function