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Searched refs:dpll_hw_state (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_dpll_mgr.c262 if (memcmp(&crtc_state->dpll_hw_state, in intel_find_shared_dpll()
264 sizeof(crtc_state->dpll_hw_state)) == 0) { in intel_find_shared_dpll()
300 crtc_state->dpll_hw_state; in intel_reference_shared_dpll()
778 crtc_state->dpll_hw_state.wrpll = val; in hsw_ddi_hdmi_get_dpll()
826 memset(&crtc_state->dpll_hw_state, 0, in hsw_get_dpll()
827 sizeof(crtc_state->dpll_hw_state)); in hsw_get_dpll()
837 crtc_state->dpll_hw_state.spll = in hsw_get_dpll()
1330 memset(&crtc_state->dpll_hw_state, 0, in skl_ddi_hdmi_pll_dividers()
1331 sizeof(crtc_state->dpll_hw_state)); in skl_ddi_hdmi_pll_dividers()
1333 crtc_state->dpll_hw_state.ctrl1 = ctrl1; in skl_ddi_hdmi_pll_dividers()
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Dintel_display.c1394 I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll); in _vlv_enable_pll()
1417 if (pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) in vlv_enable_pll()
1420 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in vlv_enable_pll()
1448 I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll); in _chv_enable_pll()
1468 if (pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) in chv_enable_pll()
1479 I915_WRITE(DPLL_MD(PIPE_B), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()
1481 dev_priv->chv_dpll_md[pipe] = pipe_config->dpll_hw_state.dpll_md; in chv_enable_pll()
1489 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()
1512 u32 dpll = crtc_state->dpll_hw_state.dpll; in i9xx_enable_pll()
1549 crtc_state->dpll_hw_state.dpll_md); in i9xx_enable_pll()
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Dintel_drv.h810 struct intel_dpll_hw_state dpll_hw_state; member
Dintel_ddi.c1637 state = &crtc_state->dpll_hw_state; in bxt_calc_pll_link()