| /Linux-v4.19/drivers/spi/ |
| D | spi-qup.c | 164 static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag) in spi_qup_is_flag_set() argument
166 u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_is_flag_set()
180 static inline unsigned int spi_qup_len(struct spi_qup *controller) in spi_qup_len() argument
182 return controller->n_words * controller->w_size; in spi_qup_len()
185 static inline bool spi_qup_is_valid_state(struct spi_qup *controller) in spi_qup_is_valid_state() argument
187 u32 opstate = readl_relaxed(controller->base + QUP_STATE); in spi_qup_is_valid_state()
192 static int spi_qup_set_state(struct spi_qup *controller, u32 state) in spi_qup_set_state() argument
198 while (!spi_qup_is_valid_state(controller)) { in spi_qup_set_state()
207 dev_dbg(controller->dev, "invalid state for %ld,us %d\n", in spi_qup_set_state()
210 cur_state = readl_relaxed(controller->base + QUP_STATE); in spi_qup_set_state()
[all …]
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| /Linux-v4.19/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | l2cache.txt | 9 "fsl,8540-l2-cache-controller"
10 "fsl,8541-l2-cache-controller"
11 "fsl,8544-l2-cache-controller"
12 "fsl,8548-l2-cache-controller"
13 "fsl,8555-l2-cache-controller"
14 "fsl,8568-l2-cache-controller"
15 "fsl,b4420-l2-cache-controller"
16 "fsl,b4860-l2-cache-controller"
17 "fsl,bsc9131-l2-cache-controller"
18 "fsl,bsc9132-l2-cache-controller"
[all …]
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| /Linux-v4.19/drivers/usb/musb/ |
| D | musb_cppi41.c | 37 struct dma_controller controller; member
61 if (!is_host_active(cppi41_channel->controller->controller.musb)) in save_rx_toggle()
187 struct cppi41_dma_controller *controller; in cppi41_recheck_tx_req() local
193 controller = container_of(timer, struct cppi41_dma_controller, in cppi41_recheck_tx_req()
195 musb = controller->controller.musb; in cppi41_recheck_tx_req()
198 list_for_each_entry_safe(cppi41_channel, n, &controller->early_tx_list, in cppi41_recheck_tx_req()
210 if (!list_empty(&controller->early_tx_list) && in cppi41_recheck_tx_req()
211 !hrtimer_is_queued(&controller->early_tx)) { in cppi41_recheck_tx_req()
213 hrtimer_forward_now(&controller->early_tx, 20 * NSEC_PER_USEC); in cppi41_recheck_tx_req()
226 struct cppi41_dma_controller *controller; in cppi41_dma_callback() local
[all …]
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| D | musbhsdma.c | 60 struct musb_dma_controller *controller; member
70 struct dma_controller controller; member
81 static void dma_controller_stop(struct musb_dma_controller *controller) in dma_controller_stop() argument
83 struct musb *musb = controller->private_data; in dma_controller_stop()
87 if (controller->used_channels != 0) { in dma_controller_stop()
88 dev_err(musb->controller, in dma_controller_stop()
92 if (controller->used_channels & (1 << bit)) { in dma_controller_stop()
93 channel = &controller->channel[bit].channel; in dma_controller_stop()
96 if (!controller->used_channels) in dma_controller_stop()
106 struct musb_dma_controller *controller = container_of(c, in dma_channel_allocate() local
[all …]
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| D | ux500_dma.c | 32 struct ux500_dma_controller *controller; member
43 struct dma_controller controller; member
59 dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", in ux500_dma_callback()
82 struct musb *musb = ux500_channel->controller->private_data; in ux500_configure_channel()
84 ux500_channel->controller->phy_base); in ux500_configure_channel()
86 dev_dbg(musb->controller, in ux500_configure_channel()
131 struct ux500_dma_controller *controller = container_of(c, in ux500_dma_channel_allocate() local
132 struct ux500_dma_controller, controller); in ux500_dma_channel_allocate()
134 struct musb *musb = controller->private_data; in ux500_dma_channel_allocate()
147 ux500_channel = is_tx ? &(controller->tx_channel[ch_num]) : in ux500_dma_channel_allocate()
[all …]
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| D | cppi_dma.c | 119 c->controller = cppi; in cppi_pool_init()
138 struct cppi *cppi = c->controller; in cppi_pool_free()
143 c->controller = NULL; in cppi_pool_free()
155 static void cppi_controller_start(struct cppi *controller) in cppi_controller_start() argument
161 for (i = 0; i < ARRAY_SIZE(controller->tx); i++) { in cppi_controller_start()
162 controller->tx[i].transmit = true; in cppi_controller_start()
163 controller->tx[i].index = i; in cppi_controller_start()
165 for (i = 0; i < ARRAY_SIZE(controller->rx); i++) { in cppi_controller_start()
166 controller->rx[i].transmit = false; in cppi_controller_start()
167 controller->rx[i].index = i; in cppi_controller_start()
[all …]
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| /Linux-v4.19/drivers/gpio/ |
| D | gpio-zevio.c | 80 struct zevio_gpio *controller = gpiochip_get_data(chip); in zevio_gpio_get() local
83 spin_lock(&controller->lock); in zevio_gpio_get()
84 dir = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_DIRECTION); in zevio_gpio_get()
86 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_INPUT); in zevio_gpio_get()
88 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_OUTPUT); in zevio_gpio_get()
89 spin_unlock(&controller->lock); in zevio_gpio_get()
96 struct zevio_gpio *controller = gpiochip_get_data(chip); in zevio_gpio_set() local
99 spin_lock(&controller->lock); in zevio_gpio_set()
100 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_OUTPUT); in zevio_gpio_set()
106 zevio_gpio_port_set(controller, pin, ZEVIO_GPIO_OUTPUT, val); in zevio_gpio_set()
[all …]
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| /Linux-v4.19/arch/arm/boot/dts/ |
| D | exynos5410-pinctrl.dtsi | 13 gpio-controller;
16 interrupt-controller;
21 gpio-controller;
24 interrupt-controller;
29 gpio-controller;
32 interrupt-controller;
37 gpio-controller;
40 interrupt-controller;
45 gpio-controller;
48 interrupt-controller;
[all …]
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| D | exynos5260-pinctrl.dtsi | 16 gpio-controller;
19 interrupt-controller;
24 gpio-controller;
27 interrupt-controller;
32 gpio-controller;
35 interrupt-controller;
40 gpio-controller;
43 interrupt-controller;
48 gpio-controller;
51 interrupt-controller;
[all …]
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| D | exynos5420-pinctrl.dtsi | 16 gpio-controller;
19 interrupt-controller;
24 gpio-controller;
27 interrupt-controller;
35 gpio-controller;
38 interrupt-controller;
46 gpio-controller;
49 interrupt-controller;
54 gpio-controller;
57 interrupt-controller;
[all …]
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| D | exynos5250-pinctrl.dtsi | 16 gpio-controller;
19 interrupt-controller;
24 gpio-controller;
27 interrupt-controller;
32 gpio-controller;
35 interrupt-controller;
40 gpio-controller;
43 interrupt-controller;
48 gpio-controller;
51 interrupt-controller;
[all …]
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| /Linux-v4.19/drivers/mtd/spi-nor/ |
| D | aspeed-smc.c | 98 struct aspeed_smc_controller *controller; member
201 #define SEGMENT_ADDR_REG(controller, cs) \ argument
202 ((controller)->regs + SEGMENT_ADDR_REG0 + (cs) * 4)
262 return BIT(chip->controller->info->we0 + chip->cs); in aspeed_smc_chip_write_bit()
267 struct aspeed_smc_controller *controller = chip->controller; in aspeed_smc_chip_check_config() local
270 reg = readl(controller->regs + CONFIG_REG); in aspeed_smc_chip_check_config()
275 dev_dbg(controller->dev, "config write is not set ! @%p: 0x%08x\n", in aspeed_smc_chip_check_config()
276 controller->regs + CONFIG_REG, reg); in aspeed_smc_chip_check_config()
278 writel(reg, controller->regs + CONFIG_REG); in aspeed_smc_chip_check_config()
316 mutex_lock(&chip->controller->mutex); in aspeed_smc_prep()
[all …]
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| /Linux-v4.19/Documentation/devicetree/bindings/gpio/ |
| D | renesas,gpio-rcar.txt | 6 - "renesas,gpio-r8a7743": for R8A7743 (RZ/G1M) compatible GPIO controller.
7 - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller.
8 - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller.
9 - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller.
10 - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller.
11 - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller.
12 - "renesas,gpio-r8a7791": for R8A7791 (R-Car M2-W) compatible GPIO controller.
13 - "renesas,gpio-r8a7792": for R8A7792 (R-Car V2H) compatible GPIO controller.
14 - "renesas,gpio-r8a7793": for R8A7793 (R-Car M2-N) compatible GPIO controller.
15 - "renesas,gpio-r8a7794": for R8A7794 (R-Car E2) compatible GPIO controller.
[all …]
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| D | gpio-mxs.txt | 1 * Freescale MXS GPIO controller
3 The Freescale MXS GPIO controller is part of MXS PIN controller. The
6 As the GPIO controller is embedded in the PIN controller and all the
7 GPIO ports share the same IO space with PIN controller, the GPIO node
14 - gpio-controller : Marks the device node as a gpio controller.
19 - interrupt-controller: Marks the device node as an interrupt controller.
47 gpio-controller;
49 interrupt-controller;
56 gpio-controller;
58 interrupt-controller;
[all …]
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| D | 8xxx_gpio.txt | 6 Every GPIO controller node must have #gpio-cells property defined,
12 controller, see bindings/interrupt-controller/interrupts.txt (the
16 The GPIO module may serve as another interrupt controller (cascaded to
17 the SoC's internal interrupt controller). See the interrupt controller
18 nodes section in bindings/interrupt-controller/interrupts.txt for
29 - gpio-controller: Marks the port as GPIO controller.
32 - interrupt-controller: Empty boolean property which marks the GPIO
33 module as an IRQ controller.
36 this interrupt controller. The first cell
43 Example of gpio-controller nodes for a MPC8347 SoC:
[all …]
|
| /Linux-v4.19/Documentation/devicetree/bindings/clock/ |
| D | exynos5433-clock.txt | 3 The Exynos5433 clock controller generates and supplies clock to various
9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF
14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF
16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC
18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS
20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS
22 - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D
24 - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP
26 - "samsung,exynos5433-cmu-aud" - clock controller compatible for CMU_AUD
[all …]
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| /Linux-v4.19/arch/arm64/boot/dts/exynos/ |
| D | exynos7-pinctrl.dtsi | 16 gpio-controller;
19 interrupt-controller;
33 gpio-controller;
36 interrupt-controller;
50 gpio-controller;
53 interrupt-controller;
58 gpio-controller;
61 interrupt-controller;
68 gpio-controller;
71 interrupt-controller;
[all …]
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| D | exynos5433-pinctrl.dtsi | 24 gpio-controller;
27 interrupt-controller;
41 gpio-controller;
44 interrupt-controller;
58 gpio-controller;
61 interrupt-controller;
66 gpio-controller;
69 interrupt-controller;
74 gpio-controller;
77 interrupt-controller;
[all …]
|
| /Linux-v4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | mrvl,intc.txt | 1 * Marvell MMP Interrupt controller
6 - reg : Address and length of the register set of the interrupt controller.
7 If the interrupt controller is intc, address and length means the range
8 of the whold interrupt controller. If the interrupt controller is mux-intc,
10 range of intc. mux-intc is secondary interrupt controller.
11 - reg-names : Name of the register set of the interrupt controller. It's
12 only required in mux-intc interrupt controller.
14 only required in mux-intc interrupt controller.
15 - interrupt-controller : Identifies the node as an interrupt controller.
19 controller.
[all …]
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| D | fsl,ls-scfg-msi.txt | 1 * Freescale Layerscape SCFG PCIe MSI controller
6 Layerscape PCIe MSI controller block such as:
12 - msi-controller: indicates that this is a PCIe MSI controller node
13 - reg: physical base address of the controller and length of memory mapped.
14 - interrupts: an interrupt to the parent interrupt controller.
16 This interrupt controller hardware is a second level interrupt controller that
17 is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based
19 controller will be used.
21 MSI controller node
25 msi1: msi-controller@1571000 {
[all …]
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| /Linux-v4.19/Documentation/devicetree/bindings/pci/ |
| D | pci-msi.txt | 23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
32 - msi-map: Maps a Requester ID to an MSI controller and associated
34 (rid-base,msi-controller,msi-base,length), where:
38 * msi-controller is a single phandle to an MSI controller
47 the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
53 the root complex and MSI controller do not pass sideband data with MSI
54 writes, this property may be used to describe the MSI controller(s)
66 msi: msi-controller@a {
68 compatible = "vendor,some-controller";
69 msi-controller;
[all …]
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| /Linux-v4.19/drivers/char/agp/ |
| D | frontend.c | 295 struct agp_controller *controller; in agp_find_controller_by_pid() local
297 controller = agp_fe.controllers; in agp_find_controller_by_pid()
299 while (controller != NULL) { in agp_find_controller_by_pid()
300 if (controller->pid == id) in agp_find_controller_by_pid()
301 return controller; in agp_find_controller_by_pid()
302 controller = controller->next; in agp_find_controller_by_pid()
310 struct agp_controller *controller; in agp_create_controller() local
312 controller = kzalloc(sizeof(struct agp_controller), GFP_KERNEL); in agp_create_controller()
313 if (controller == NULL) in agp_create_controller()
316 controller->pid = id; in agp_create_controller()
[all …]
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| /Linux-v4.19/Documentation/devicetree/bindings/mux/ |
| D | mux-controller.txt | 1 Common multiplexer controller bindings
4 A multiplexer (or mux) controller will have one, or several, consumer devices
5 that uses the mux controller. Thus, a mux controller can possibly control
7 multiplexer needed by each consumer, but a single mux controller can of course
10 A mux controller provides a number of states to its consumers, and the state
18 Mux controller consumers should specify a list of mux controllers that they
23 mux-ctrl-phandle : phandle to mux controller node
25 given mux controller (controller specific)
27 Mux controller properties should be named "mux-controls". The exact meaning of
28 each mux controller property must be documented in the device tree binding for
[all …]
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| /Linux-v4.19/Documentation/devicetree/bindings/pinctrl/ |
| D | samsung-pinctrl.txt | 1 Samsung GPIO and Pin Mux/Config controller
4 controller. It controls the input/output settings on the available pads/pins
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller.
17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
[all …]
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| /Linux-v4.19/arch/powerpc/boot/dts/ |
| D | mucmc52.dts | 17 &gpt0 { gpio-controller; };
18 &gpt1 { gpio-controller; };
19 &gpt2 { gpio-controller; };
20 &gpt3 { gpio-controller; };
164 simple100: gpio-controller-100@3,600100 {
167 gpio-controller;
170 simple104: gpio-controller-104@3,600104 {
173 gpio-controller;
176 simple200: gpio-controller-200@3,600200 {
179 gpio-controller;
[all …]
|
