Searched refs:EXYNOS_SCLK_I2S (Results 1 – 11 of 11) sorted by relevance
20 #define EXYNOS_SCLK_I2S 7 macro
46 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
39 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
231 <&clock_audss EXYNOS_SCLK_I2S>;
507 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
76 <&clock_audss EXYNOS_SCLK_I2S>;
514 <&clock_audss EXYNOS_SCLK_I2S>;
434 <&clock_audss EXYNOS_SCLK_I2S>;
98 <&clock_audss EXYNOS_SCLK_I2S>,
226 clk_table[EXYNOS_SCLK_I2S] = clk_hw_register_gate(dev, "sclk_i2s", in exynos_audss_clk_probe()
77 <&clock_audss EXYNOS_SCLK_I2S>;
