/Linux-v6.1/Documentation/devicetree/bindings/arm/ |
D | arm,realview.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 14 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to 22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created 26 - const: arm,realview-eb 27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S 28 (HBI-0147) was created as a development board to test ARM TrustZone, 31 - const: arm,realview-pb1176 [all …]
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D | syna.txt | 3 According to https://www.synaptics.com/company/news/conexant-marvell 7 --------------------------------------------------------------- 19 --------------------------------------------------------------- 30 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005) 32 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114) 38 model = "Sony NSZ-GS7"; 39 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin"; 50 - compatible: should be "marvell,berlin-cpu-ctrl" 51 - reg: address and length of the register set 55 cpu-ctrl@f7dd0000 { [all …]
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/Linux-v6.1/arch/arm64/boot/dts/sprd/ |
D | sharkl3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 compatible = "simple-bus"; 15 #address-cells = <2>; 16 #size-cells = <2>; 20 compatible = "sprd,sc9863a-glbregs", "syscon", 21 "simple-mfd"; 23 #address-cells = <1>; [all …]
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/Linux-v6.1/drivers/mfd/ |
D | simple-mfd-i2c.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Simple MFD - I2C 10 * shared by all sub-devices. Children can use their parent's device structure 13 * Once the register map has been successfully initialised, any sub-devices 14 * represented by child nodes in Device Tree or via the MFD cells in this file 20 #include <linux/mfd/core.h> 25 #include "simple-mfd-i2c.h" 39 simple_mfd_data = device_get_match_data(&i2c->dev); in simple_mfd_i2c_probe() 42 if (!simple_mfd_data || !simple_mfd_data->regmap_config) in simple_mfd_i2c_probe() 45 regmap_config = simple_mfd_data->regmap_config; in simple_mfd_i2c_probe() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mfd/ |
D | mfd.txt | 1 Multi-Function Devices (MFD) 4 more than one non-unique yet varying hardware functionality. 6 A typical MFD can be: 8 - A mixed signal ASIC on an external bus, sometimes a PMIC (Power Management 14 - A range of memory registers containing "miscellaneous system registers" also 20 - compatible : "simple-mfd" - this signifies that the operating system should 21 consider all subnodes of the MFD device as separate devices akin to how 22 "simple-bus" indicates when to see subnodes as children for a simple 23 memory-mapped bus. For more complex devices, when the nexus driver has to 28 - ranges: Describes the address mapping relationship to the parent. Should set [all …]
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D | sprd,ums512-glbreg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Orson Zhai <orsonzhai@gmail.com> 12 - Baolin Wang <baolin.wang7@gmail.com> 13 - Chunyan Zhang <zhang.lyra@gmail.com> 22 - const: sprd,ums512-glbregs 23 - const: syscon 24 - const: simple-mfd [all …]
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D | brcm,misc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/brcm,misc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rafał Miłecki <rafal@milecki.pl> 14 bcm4908). It's used to implement some simple functions like a watchdog, PCIe 20 - const: brcm,misc 21 - const: simple-mfd 28 "#address-cells": 31 "#size-cells": [all …]
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D | brcm,twd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/brcm,twd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom's Timer-Watchdog (aka TWD) 10 - Rafał Miłecki <rafal@milecki.pl> 13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908, 21 - enum: 22 - brcm,bcm4908-twd 23 - brcm,bcm7038-twd [all …]
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D | xylon,logicvc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/mfd/xylon,logicvc.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 8 title: Xylon LogiCVC multi-function device 11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com> 15 As a result, a multi-function device is exposed as parent of the display 21 - enum: 22 - xylon,logicvc-3.02.a 23 - const: syscon [all …]
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D | mediatek,mt8195-scpsys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 20 - enum: 21 - mediatek,mt8167-scpsys 22 - mediatek,mt8173-scpsys 23 - mediatek,mt8183-scpsys 24 - mediatek,mt8186-scpsys [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mips/ |
D | mscc.txt | 7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" 19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon" 20 - reg : Should contain registers location and length 24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; 36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" 37 - reg : Should contain registers location and length 41 compatible = "mscc,ocelot-cpu-syscon", "syscon"; 52 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" 53 - reg : Should contain registers location and length 57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
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/Linux-v6.1/arch/arm64/boot/dts/realtek/ |
D | rtd129x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 5 * Copyright (c) 2016-2019 Andreas Färber 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/realtek,rtd1295.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; [all …]
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D | rtd139x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/realtek,rtd1295.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 19 reserved-memory { 20 #address-cells = <1>; 21 #size-cells = <1>; 34 no-map; [all …]
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D | rtd16xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; 17 reserved-memory { 18 #address-cells = <1>; 19 #size-cells = <1>; 32 no-map; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/clock/ |
D | oxnas,stdclk.txt | 4 Please also refer to clock-bindings.txt in this directory for common clock 8 - compatible: For OX810SE, should be "oxsemi,ox810se-stdclk" 9 For OX820, should be "oxsemi,ox820-stdclk" 10 - #clock-cells: 1, see below 13 - compatible: For OX810SE, should be 14 "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd" 16 "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd" 20 sys: sys-ctrl@000000 { 21 compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"; 25 compatible = "oxsemi,ox810se-stdclk"; [all …]
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D | socionext,uniphier-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/socionext,uniphier-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - description: System clock 17 - socionext,uniphier-ld4-clock 18 - socionext,uniphier-pro4-clock 19 - socionext,uniphier-sld8-clock 20 - socionext,uniphier-pro5-clock [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | rtd1195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 * Copyright (c) 2017-2019 Andreas Färber 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/realtek,rtd1195.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-a7"; [all …]
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D | uniphier-pro4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-pro4"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a9"; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/reset/ |
D | oxnas,reset.txt | 8 - compatible: For OX810SE, should be "oxsemi,ox810se-reset" 9 For OX820, should be "oxsemi,ox820-reset" 10 - #reset-cells: 1, see below 13 - compatible: For OX810SE, should be : 14 "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd" 16 "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd" 18 Reset indices are in dt-bindings include files : 19 - For OX810SE: include/dt-bindings/reset/oxsemi,ox810se.h 20 - For OX820: include/dt-bindings/reset/oxsemi,ox820.h 24 sys: sys-ctrl@000000 { [all …]
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D | socionext,uniphier-reset.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-reset.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - description: System reset 17 - socionext,uniphier-ld4-reset 18 - socionext,uniphier-pro4-reset 19 - socionext,uniphier-sld8-reset 20 - socionext,uniphier-pro5-reset [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/misc/ |
D | aspeed-p2a-ctrl.txt | 2 Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver 14 - compatible: must be one of: 15 - "aspeed,ast2400-p2a-ctrl" 16 - "aspeed,ast2500-p2a-ctrl" 21 - reg: A hint for the memory regions associated with the P2A controller 22 - memory-region: A phandle to a reserved_memory region to be used for the PCI 25 The p2a-control node should be the child of a syscon node with the required 28 - compatible : Should be one of the following: 29 "aspeed,ast2400-scu", "syscon", "simple-mfd" 30 "aspeed,ast2500-scu", "syscon", "simple-mfd" [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
D | aspeed,ast2500-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Jeffery <andrew@aj.id.au> 16 - compatible: Should be one of the following: 17 "aspeed,ast2500-scu", "syscon", "simple-mfd" 18 "aspeed,g5-scu", "syscon", "simple-mfd" 21 Documentation/devicetree/bindings/mfd/syscon.yaml 25 const: aspeed,ast2500-pinctrl [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/soc/microchip/ |
D | atmel,at91rm9200-tcb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Belloni <alexandre.belloni@bootlin.com> 19 - enum: 20 - atmel,at91rm9200-tcb 21 - atmel,at91sam9x5-tcb 22 - atmel,sama5d2-tcb 23 - const: simple-mfd [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/thermal/ |
D | brcm,avs-ro-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/brcm,avs-ro-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stefan Wahren <wahrenst@gmx.net> 16 - compatible: Should be one of the following: 17 "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd" 20 Documentation/devicetree/bindings/mfd/syscon.yaml 24 const: brcm,bcm2711-thermal 26 # See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for details [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/arm/marvell/ |
D | ap80x-system-controller.txt | 6 registers giving access to numerous features: clocks, pin-muxing and 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the AP80x system controller 18 ------- 24 - 0: reference clock of CPU cluster 0 25 - 1: reference clock of CPU cluster 1 26 - 2: fixed PLL at 1200 Mhz 27 - 3: MSS clock, derived from the fixed PLL 31 - compatible: must be one of: 32 * "marvell,ap806-clock" [all …]
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