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/Linux-v5.15/drivers/pinctrl/intel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
9 select PINCTRL_INTEL
12 platforms. Supports 3 banks with 102, 28 and 44 gpios.
21 select PINCTRL_INTEL
24 allows configuring of SoC pins and using them as GPIOs.
29 select PINMUX
30 select PINCONF
31 select GENERIC_PINCONF
32 select GPIOLIB
33 select GPIOLIB_IRQCHIP
[all …]
/Linux-v5.15/drivers/gpio/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 int "Maximum number of GPIOs for fast path"
47 select IRQ_DOMAIN
55 These checks help ensure that GPIOs have been properly initialized
57 non-sleeping contexts. They can make bitbanged serial protocols
64 select GPIO_CDEV # We need to encourage the new ABI
66 Say Y here to add the legacy sysfs interface for GPIOs.
78 for GPIOs. The character device allows userspace to control GPIOs
116 tristate "GPIO driver for 74xx-ICs with MMIO access"
118 select GPIO_GENERIC
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dak4458.txt7 - compatible : "asahi-kasei,ak4458" or "asahi-kasei,ak4497"
8 - reg : The I2C address of the device for I2C
11 - reset-gpios: A GPIO specifier for the power down & reset pin
12 - mute-gpios: A GPIO specifier for the soft mute pin
13 - AVDD-supply: Analog power supply
14 - DVDD-supply: Digital power supply
15 - dsd-path: Select DSD input pins for ak4497
16 0: select #16, #17, #19 pins
17 1: select #3, #4, #5 pins
23 compatible = "asahi-kasei,ak4458";
[all …]
Dsimple-audio-mux.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-audio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <aleandre.belloni@bootlin.com>
13 Simple audio multiplexers are driven using gpios, allowing to select which of
18 const: simple-audio-mux
20 mux-gpios:
22 GPIOs used to select the input line.
24 sound-name-prefix:
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/spi/
Dfsl-spi.txt4 - cell-index : QE SPI subblock index.
7 - compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
8 - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
9 - reg : Offset and length of the register set for the device
10 - interrupts : <a b> where a is the interrupt number and b is a
15 - clock-frequency : input clock frequency to non FSL_SOC cores
18 - cs-gpios : specifies the gpio pins to be used for chipselects.
19 The gpios will be referred to as reg = <index> in the SPI child nodes.
20 If unspecified, a single SPI device without a chip select can be used.
21 - fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
[all …]
Dqcom,spi-qup.txt4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
19 - clock-names: Should be "core" for the core clock and "iface" for the
22 - #address-cells: Number of cells required to define a chip select
[all …]
Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
23 sck-gpios:
[all …]
Dspi-samsung.txt8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
21 - dmas : Two or more DMA channel specifiers following the convention outlined
24 - dma-names: Names for the dma channels. There must be at least one channel
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dsff,sfp.txt1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
6 - compatible : must be one of
10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
28 - rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate
29 Select (AKA RS0) output gpio signal, low: low Rx rate, high: high Rx rate
32 - rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dgpio-mux-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/gpio-mux-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergej Sawazki <ce3a@gmx.de>
14 const: gpio-mux-clock
18 - description: First parent clock
19 - description: Second parent clock
21 '#clock-cells':
24 select-gpios:
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Darmada-xp-lenovo-ix4-300d.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Lenovo Iomega ix4-300d
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-xp-mv78230.dtsi"
15 model = "Lenovo Iomega ix4-300d";
16 compatible = "lenovo,ix4-300d", "marvell,armadaxp-mv78230",
17 "marvell,armadaxp", "marvell,armada-370-xp";
20 stdout-path = "serial0:115200n8";
[all …]
Dkirkwood-openrd.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 #include "kirkwood-6281.dtsi"
22 stdout-path = &uart0;
26 pinctrl: pin-controller@10000 {
27 pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
28 pinctrl-names = "default";
30 pmx_select28: pmx-select-rs232-rs485 {
34 pmx_sdio_cd: pmx-sdio-cd {
38 pmx_select34: pmx-select-uart-sd {
49 nr-ports = <2>;
[all …]
/Linux-v5.15/drivers/pinctrl/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
19 select PINMUX
26 select PINCONF
35 bool "Axis ARTPEC-6 pin controller driver"
37 select PINMUX
38 select GENERIC_PINCONF
40 This is the driver for the Axis ARTPEC-6 pin controller. This driver
43 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
48 select PINMUX
49 select GENERIC_PINCONF
[all …]
/Linux-v5.15/arch/powerpc/platforms/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
28 select EPAPR_PARAVIRT
37 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
48 a hypervisor. This option is not user-selectable but should
54 select RELOCATABLE if PPC64
65 bool "Device-tree based CPU feature discovery & setup"
82 Select this option if your platform supports SMP and your
114 select EPAPR_PARAVIRT
124 registers are used for inter-processor communication.
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/mtd/
Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
[all …]
Dnand-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
24 The interpretation of these parameters is implementation-defined, so
31 pattern: "^nand-controller(@.*)?"
33 "#address-cells":
36 "#size-cells":
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/misc/
Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
Deeprom-93xx46.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/eeprom-93xx46.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cory Tusar <cory.tusar@pid1solutions.com>
15 - atmel,at93c46
16 - atmel,at93c46d
17 - atmel,at93c56
18 - atmel,at93c66
19 - eeprom-93xx46
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/regulator/
Drichtek,rt6245-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rt6245-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT6245 is a high-performance, synchronous step-down converter
18 - $ref: regulator.yaml#
23 - richtek,rt6245
28 enable-gpios:
31 it will be treat as a default-on power.
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/fpga/
Daltera-passive-serial.txt11 - compatible: Must be one of the following:
12 "altr,fpga-passive-serial",
13 "altr,fpga-arria10-passive-serial"
14 - reg: SPI chip select of the FPGA
15 - nconfig-gpios: config pin (referred to as nCONFIG in the manual)
16 - nstat-gpios: status pin (referred to as nSTATUS in the manual)
19 - confd-gpios: confd pin (referred to as CONF_DONE in the manual)
23 compatible = "altr,fpga-passive-serial";
24 spi-max-frequency = <20000000>;
26 nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
[all …]
Dlattice-ice40-fpga-mgr.txt4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
/Linux-v5.15/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
30 -------
[all …]
Dgpio-max3191x.txt4 - compatible: Must be one of:
11 - reg: Chip select number.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells: Should be two. For consumer use see gpio.txt.
16 - #daisy-chained-devices:
17 Number of chips in the daisy-chain (default is 1).
18 - maxim,modesel-gpios: GPIO pins to configure modesel of each chip.
19 The number of GPIOs must equal "#daisy-chained-devices"
22 - maxim,fault-gpios: GPIO pins to read fault of each chip.
23 The number of GPIOs must equal "#daisy-chained-devices"
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/gnss/
Dsirfstar.txt1 SiRFstar-based GNSS Receiver DT binding
3 SiRFstar chipsets are used in GNSS-receiver modules produced by several
11 - compatible : Must be one of
19 - vcc-supply : Main voltage regulator (pin name: 3V3_IN, VCC, VDD)
22 - reg : I2C slave address
25 - reg : SPI chip select address
29 - sirf,onoff-gpios : GPIO used to power on and off device (pin name: ON_OFF)
30 - sirf,wakeup-gpios : GPIO used to determine device power state
32 - timepulse-gpios : Time pulse GPIO (pin name: 1PPS, TM)
42 vcc-supply = <&gnss_reg>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/display/
Dilitek,ili9225.txt7 - compatible: "vot,v220hf01a-t", "ilitek,ili9225"
8 - rs-gpios: Register select signal
9 - reset-gpios: Reset pin
12 all mandatory properties described in ../spi/spi-bus.txt must be specified.
15 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
19 compatible = "vot,v220hf01a-t", "ilitek,ili9225";
21 spi-max-frequency = <12000000>;
22 rs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
23 reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;

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