Lines Matching +full:select +full:- +full:gpios

1 # SPDX-License-Identifier: GPL-2.0
9 	select PINCTRL_INTEL
12 	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
21 	select PINCTRL_INTEL
24 	  allows configuring of SoC pins and using them as GPIOs.
29 	select PINMUX
30 	select PINCONF
31 	select GENERIC_PINCONF
32 	select GPIOLIB
33 	select GPIOLIB_IRQCHIP
37 	  using them as GPIOs.
42 	select PINMUX
43 	select PINCONF
44 	select GENERIC_PINCONF
46 	  Merrifield Family-Level Interface Shim (FLIS) driver provides an
48 	  GPIOs.
52 	select PINMUX
53 	select PINCONF
54 	select GENERIC_PINCONF
55 	select GPIOLIB
56 	select GPIOLIB_IRQCHIP
61 	select PINCTRL_INTEL
64 	  of Intel Alder Lake PCH pins and using them as GPIOs.
69 	select PINCTRL_INTEL
72 	  configuring of SoC pins and using them as GPIOs.
77 	select PINCTRL_INTEL
80 	  of Intel Cannon Lake PCH pins and using them as GPIOs.
85 	select PINCTRL_INTEL
88 	  of Intel Cedar Fork PCH pins and using them as GPIOs.
93 	select PINCTRL_INTEL
96 	  of Intel Denverton SoC pins and using them as GPIOs.
101 	select PINCTRL_INTEL
104 	  of Intel Elkhart Lake SoC pins and using them as GPIOs.
109 	select PINCTRL_INTEL
112 	  of Intel Emmitsburg pins and using them as GPIOs.
117 	select PINCTRL_INTEL
120 	  of Intel Gemini Lake SoC pins and using them as GPIOs.
125 	select PINCTRL_INTEL
128 	  of Intel Ice Lake PCH pins and using them as GPIOs.
133 	select PINCTRL_INTEL
136 	  of Intel Jasper Lake PCH pins and using them as GPIOs.
141 	select PINCTRL_INTEL
144 	  of Intel Lakefield SoC pins and using them as GPIOs.
149 	select PINCTRL_INTEL
152 	  of Intel Lewisburg pins and using them as GPIOs.
157 	select PINCTRL_INTEL
161 	  using them as GPIOs.
166 	select PINCTRL_INTEL
169 	  of Intel Tiger Lake PCH pins and using them as GPIOs.