/Linux-v5.15/Documentation/devicetree/bindings/opp/ |
D | qcom-opp.txt | 1 Qualcomm OPP bindings to describe OPP nodes 3 The bindings are based on top of the operating-points-v2 bindings 4 described in Documentation/devicetree/bindings/opp/opp-v2-base.yaml 7 * OPP Table Node 10 - compatible: Allow OPPs to express their compatibility. It should be: 11 "operating-points-v2-qcom-level" 13 * OPP Node 16 - qcom,opp-fuse-level: A positive value representing the fuse corner/level 17 associated with this OPP node. Sometimes several corners/levels shares
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D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) Bindings 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states [all …]
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D | allwinner,sun50i-h6-operating-points.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner H6 CPU OPP Device Tree Bindings 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 15 OPP varies based on the silicon variant in use. Allwinner Process 18 sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to 19 provide the OPP framework with required information. [all …]
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D | opp-v2-base.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) Common Binding 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 Devices work at voltage-current-frequency combinations and some implementations 25 pattern: '^opp-table(-[a-z0-9]+)?$' 27 opp-shared: 29 Indicates that device nodes using this OPP Table Node's phandle switch [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/display/msm/ |
D | gpu.txt | 4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or 5 "amd,imageon-XYZ.W", "amd,imageon" 6 for example: "qcom,adreno-306.0", "qcom,adreno" 9 with the chip-id. 11 - reg: Physical base address and length of the controller's registers. 12 - interrupts: The interrupt signal from the gpu. 13 - clocks: device clocks (if applicable) 14 See ../clocks/clock-bindings.txt for details. 15 - clock-names: the following clocks are required by a3xx, a4xx and a5xx 22 - qcom,adreno-630.2 [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/power/avs/ |
D | qcom,cpr.txt | 4 or other device. Each OPP of a device corresponds to a "corner" that has 10 - compatible: 13 Definition: should be "qcom,qcs404-cpr", "qcom,cpr" for qcs404 15 - reg: 17 Value type: <prop-encoded-array> 18 Definition: base address and size of the rbcpr register region 20 - interrupts: 22 Value type: <prop-encoded-array> 25 - clocks: 27 Value type: <prop-encoded-array> [all …]
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/Linux-v5.15/drivers/clk/qcom/ |
D | a53-pll.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <linux/clk-provider.h> 17 #include "clk-pll.h" 18 #include "clk-regmap.h" 68 struct dev_pm_opp *opp; in qcom_a53pll_get_freq_tbl() local 70 opp = dev_pm_opp_find_freq_ceil(dev, &freq); in qcom_a53pll_get_freq_tbl() 71 if (IS_ERR(opp)) in qcom_a53pll_get_freq_tbl() 82 dev_pm_opp_put(opp); in qcom_a53pll_get_freq_tbl() 90 struct device *dev = &pdev->dev; in qcom_a53pll_probe() 91 struct device_node *np = dev->of_node; in qcom_a53pll_probe() [all …]
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/Linux-v5.15/arch/arm/boot/dts/ |
D | omap36xx.dtsi | 4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 11 #include <dt-bindings/bus/ti-sysc.h> 12 #include <dt-bindings/media/omap3-isp.h> 24 operating-points-v2 = <&cpu0_opp_table>; 26 vbb-supply = <&abb_mpu_iva>; 27 clock-latency = <300000>; /* From omap-cpufreq driver */ 28 #cooling-cells = <2>; 32 cpu0_opp_table: opp-table { 33 compatible = "operating-points-v2-ti-cpu"; 36 opp50-300000000 { [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 dtb-$(CONFIG_ARCH_ALPINE) += \ 3 alpine-db.dtb 4 dtb-$(CONFIG_MACH_ARTPEC6) += \ 5 artpec6-devboard.dtb 6 dtb-$(CONFIG_MACH_ASM9260) += \ 7 alphascale-asm9260-devkit.dtb 9 dtb-$(CONFIG_SOC_AT91RM9200) += \ 12 dtb-$(CONFIG_SOC_AT91SAM9) += \ 14 at91-qil_a9260.dtb \ [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/fsl/ |
D | imx8m-ddrc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Leonard Crestez <leonard.crestez@nxp.com> 18 switching is implemented by TF-A code which runs from a SRAM area. 22 capabilities through standard Linux mechanism like devfreq and OPP tables. 27 - enum: 28 - fsl,imx8mn-ddrc 29 - fsl,imx8mm-ddrc [all …]
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/Linux-v5.15/arch/arm64/boot/dts/qcom/ |
D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/power/qcom-rpmpd.h> 10 #include <dt-bindings/soc/qcom,apr.h> 11 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&intc>; [all …]
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D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> 16 #include <dt-bindings/interconnect/qcom,sdm845.h> [all …]
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D | sc7180.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h> 11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/clock/qcom,videocc-sc7180.h> 14 #include <dt-bindings/interconnect/qcom,osm-l3.h> 15 #include <dt-bindings/interconnect/qcom,sc7180.h> [all …]
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D | sm8150.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/dma/qcom-gpi.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/qcom-aoss-qmp.h> 10 #include <dt-bindings/power/qcom-rpmpd.h> 11 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/clock/qcom,gcc-sm8150.h> 14 #include <dt-bindings/clock/qcom,gpucc-sm8150.h> [all …]
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D | msm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/arm/coresight-cti-dt.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/interconnect/qcom,msm8916.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 12 #include <dt-bindings/reset/qcom,gcc-msm8916.h> 13 #include <dt-bindings/thermal/thermal.h> [all …]
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D | sc7280.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 8 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,rpmh.h> 10 #include <dt-bindings/interconnect/qcom,sc7280.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/mailbox/qcom-ipcc.h> 13 #include <dt-bindings/power/qcom-aoss-qmp.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/reset/qcom,sdm845-aoss.h> [all …]
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D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/power/qcom-rpmpd.h> 9 #include <dt-bindings/gpio/gpio.h> 12 interrupt-parent = <&intc>; 14 qcom,msm-id = <292 0x0>; 16 #address-cells = <2>; [all …]
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/Linux-v5.15/drivers/cpufreq/ |
D | qcom-cpufreq-hw.c | 1 // SPDX-License-Identifier: GPL-2.0 39 void __iomem *base; member 44 * Mutex to synchronize between de-init sequence and re-starting LMh 61 struct dev_pm_opp *opp; in qcom_cpufreq_set_bw() local 65 dev = get_cpu_device(policy->cpu); in qcom_cpufreq_set_bw() 67 return -ENODEV; in qcom_cpufreq_set_bw() 69 opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true); in qcom_cpufreq_set_bw() 70 if (IS_ERR(opp)) in qcom_cpufreq_set_bw() 71 return PTR_ERR(opp); in qcom_cpufreq_set_bw() 73 ret = dev_pm_opp_set_opp(dev, opp); in qcom_cpufreq_set_bw() [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/power/ |
D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/power-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rafael J. Wysocki <rjw@rjwysocki.net> 11 - Kevin Hilman <khilman@kernel.org> 12 - Ulf Hansson <ulf.hansson@linaro.org> 24 \#power-domain-cells property in the PM domain provider node. 28 pattern: "^(power-controller|power-domain)([@-].*)?$" 30 domain-idle-states: [all …]
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/Linux-v5.15/drivers/opp/ |
D | ti-opp-supply.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 5 * Dave Gerlach <d-gerlach@ti.com> 7 * TI OPP supply driver that provides override into the regulator control 8 * for generic opp core to handle devices with ABB regulator and/or 25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table 35 * struct ti_opp_supply_data - OMAP specific opp supply data 49 * struct ti_opp_supply_of_data - device tree match data 50 * @flags: specific type of opp supply 52 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume [all …]
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/Linux-v5.15/arch/arm64/boot/dts/mediatek/ |
D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; [all …]
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/Linux-v5.15/arch/arm64/boot/dts/hisilicon/ |
D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/hisi,hi6220-resets.h> 10 #include <dt-bindings/clock/hi6220-clock.h> 11 #include <dt-bindings/pinctrl/hisi.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 21 compatible = "arm,psci-0.2"; [all …]
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/Linux-v5.15/drivers/soc/qcom/ |
D | cpr.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 27 #include <linux/nvmem-consumer.h> 29 /* Register Offsets for RB-CPR and Bit Definitions */ 125 #define FUSE_REVISION_UNKNOWN (-1) 233 void __iomem *base; member 254 return !drv->loop_disabled; in cpr_is_allowed() 259 writel_relaxed(value, drv->base + offset); in cpr_write() 264 return readl_relaxed(drv->base + offset); in cpr_read() 272 val = readl_relaxed(drv->base + offset); in cpr_masked_write() [all …]
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/Linux-v5.15/drivers/gpu/drm/msm/adreno/ |
D | adreno_gpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 28 struct device *dev = &gpu->pdev->dev; in zap_shader_load_mdt() 40 return -EINVAL; in zap_shader_load_mdt() 43 np = of_get_child_by_name(dev->of_node, "zap-shader"); in zap_shader_load_mdt() 46 return -ENODEV; in zap_shader_load_mdt() 49 mem_np = of_parse_phandle(np, "memory-region", 0); in zap_shader_load_mdt() 53 return -EINVAL; in zap_shader_load_mdt() 64 * Check for a firmware-name property. This is the new scheme in zap_shader_load_mdt() 69 * If the firmware-name property is found, we bypass the in zap_shader_load_mdt() 73 * If the firmware-name property is not found, for backwards in zap_shader_load_mdt() [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/thermal/ |
D | thermal-zones.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml# 6 $schema: http://devicetree.org/meta-schemas/base.yaml# 11 - Amit Kucheria <amitk@kernel.org> 20 - thermal-sensor: device that measures temperature, has SoC-specific bindings 21 - cooling-device: device used to dissipate heat either passively or actively 22 - thermal-zones: a container of the following node types used to describe all 25 This binding describes the thermal-zones. 27 The polling-delay properties of a thermal-zone are bound to the maximum dT/dt [all …]
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