Searched +full:npe +full:- +full:handle (Results 1 – 10 of 10) sorted by relevance
/Linux-v5.15/Documentation/devicetree/bindings/net/ |
D | intel,ixp4xx-ethernet.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - $ref: "ethernet-controller.yaml#" 14 - Linus Walleij <linus.walleij@linaro.org> 17 The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network 24 const: intel,ixp4xx-ethernet 30 queue-rx: 31 $ref: '/schemas/types.yaml#/definitions/phandle-array' [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/crypto/ |
D | intel,ixp4xx-crypto.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Linus Walleij <linus.walleij@linaro.org> 14 The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE 16 it is defined as a subnode of the NPE, if crypto support is 21 const: intel,ixp4xx-crypto 23 intel,npe-handle: 24 $ref: '/schemas/types.yaml#/definitions/phandle-array' [all …]
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/Linux-v5.15/arch/arm/boot/dts/ |
D | intel-ixp4xx.dtsi | 1 // SPDX-License-Identifier: ISC 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/gpio/gpio.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 compatible = "simple-bus"; 15 interrupt-parent = <&intcon>; 22 /* compatible and reg filled in by per-soc device tree */ 23 native-endian; 24 #address-cells = <2>; [all …]
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D | intel-ixp43x-kixrp435.dts | 1 // SPDX-License-Identifier: ISC 7 /dts-v1/; 9 #include "intel-ixp43x.dtsi" 10 #include "intel-ixp4xx-reference-design.dtsi" 11 #include <dt-bindings/input/input.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 22 compatible = "intel,ixp4xx-flash", "cfi-flash"; 23 bank-width = <2>; 25 intel,ixp4xx-eb-write-enable = <1>; [all …]
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D | intel-ixp43x-gateworks-gw2358.dts | 1 // SPDX-License-Identifier: ISC 3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358 6 /dts-v1/; 8 #include "intel-ixp43x.dtsi" 13 #address-cells = <1>; 14 #size-cells = <1>; 24 stdout-path = "uart0:115200n8"; 32 compatible = "gpio-leds"; 33 led-user { 36 default-state = "on"; [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/firmware/ |
D | intel,ixp4xx-network-processing-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Linus Walleij <linus.walleij@linaro.org> 14 On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small 24 - items: 25 - const: intel,ixp4xx-network-processing-engine 29 - description: NPE0 (NPE-A) register range 30 - description: NPE1 (NPE-B) register range [all …]
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/Linux-v5.15/drivers/net/ethernet/xscale/ |
D | ixp4xx_eth.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C) 13 * RX-free queue 26 27 28 14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable 17 * bits 0 -> 1 - NPE ID (RX and TX-done) 18 * bits 0 -> 2 - priority (TX, per 802.1D) 19 * bits 3 -> 4 - port ID (user-set?) 20 * bits 5 -> 31 - physical descriptor address 24 #include <linux/dma-mapping.h> 38 #include <linux/soc/ixp4xx/npe.h> [all …]
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/Linux-v5.15/drivers/crypto/ |
D | ixp4xx_crypto.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Intel IXP4xx NPE-C crypto driver 9 #include <linux/dma-mapping.h> 31 #include <linux/soc/ixp4xx/npe.h> 34 /* Intermittent includes, delete this after v5.14-rc1 */ 36 #include <mach/ixp4xx-regs.h> 137 u32 crypto_ctx; /* NPE Crypto Param structure address */ 224 static struct npe *npe_c; 240 return crypt_phys + (virt - crypt_virt) * sizeof(struct crypt_ctl); in crypt_virt2phys() 245 return crypt_virt + (phys - crypt_phys) / sizeof(struct crypt_ctl); in crypt_phys2virt() [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 39 called padlock-aes. 53 called padlock-sha. 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 65 will be called geode-aes. 142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 152 SHA256 secure hash standard (DFIPS 180-2). 194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 206 AES cipher algorithms (FIPS-197). 223 and uses triple-DES to generate secure random numbers like the [all …]
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/Linux-v5.15/drivers/edac/ |
D | edac_pci_sysfs.c | 23 static int edac_pci_log_npe = 1; /* log PCI non-parity error errors */ 61 return sprintf(data, "%u\n", atomic_read(&pci->counters.pe_count)); in instance_pe_count_show() 67 return sprintf(data, "%u\n", atomic_read(&pci->counters.npe_count)); in instance_npe_count_show() 103 if (instance_attr->show) in edac_pci_instance_show() 104 return instance_attr->show(pci, buffer); in edac_pci_instance_show() 105 return -EIO; in edac_pci_instance_show() 116 if (instance_attr->store) in edac_pci_instance_store() 117 return instance_attr->store(pci, buffer, count); in edac_pci_instance_store() 118 return -EIO; in edac_pci_instance_store() 169 err = -ENODEV; in edac_pci_create_instance_kobj() [all …]
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