Lines Matching +full:npe +full:- +full:handle
1 // SPDX-License-Identifier: GPL-2.0-only
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
24 #include <linux/dma-mapping.h>
38 #include <linux/soc/ixp4xx/npe.h>
67 #define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */
77 #define PORT2CHANNEL(p) NPE_ID(p->id)
105 #define CORE_MDC_EN 0x10 /* MDIO using NPE-B ETH-0 only */
114 /* NPE message codes */
173 struct npe *npe; member
187 /* NPE message structure */
236 #define rx_desc_phys(port, n) ((port)->desc_tab_phys + \
238 #define rx_desc_ptr(port, n) (&(port)->desc_tab[n])
240 #define tx_desc_phys(port, n) ((port)->desc_tab_phys + \
242 #define tx_desc_ptr(port, n) (&(port)->desc_tab[(n) + RX_DESCS])
263 u8 *data = skb->data; in ixp_ptp_match()
273 if (skb->len < offset + OFF_PTP_SEQUENCE_ID + sizeof(seqid)) in ixp_ptp_match()
294 if (!port->hwts_rx_en) in ixp_rx_timestamp()
299 regs = port->timesync_regs; in ixp_rx_timestamp()
301 val = __raw_readl(®s->channel[ch].ch_event); in ixp_rx_timestamp()
306 lo = __raw_readl(®s->channel[ch].src_uuid_lo); in ixp_rx_timestamp()
307 hi = __raw_readl(®s->channel[ch].src_uuid_hi); in ixp_rx_timestamp()
315 lo = __raw_readl(®s->channel[ch].rx_snap_lo); in ixp_rx_timestamp()
316 hi = __raw_readl(®s->channel[ch].rx_snap_hi); in ixp_rx_timestamp()
323 shhwtstamps->hwtstamp = ns_to_ktime(ns); in ixp_rx_timestamp()
325 __raw_writel(RX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event); in ixp_rx_timestamp()
337 if (unlikely(shtx->tx_flags & SKBTX_HW_TSTAMP && port->hwts_tx_en)) in ixp_tx_timestamp()
338 shtx->tx_flags |= SKBTX_IN_PROGRESS; in ixp_tx_timestamp()
344 regs = port->timesync_regs; in ixp_tx_timestamp()
351 val = __raw_readl(®s->channel[ch].ch_event); in ixp_tx_timestamp()
357 shtx->tx_flags &= ~SKBTX_IN_PROGRESS; in ixp_tx_timestamp()
361 lo = __raw_readl(®s->channel[ch].tx_snap_lo); in ixp_tx_timestamp()
362 hi = __raw_readl(®s->channel[ch].tx_snap_hi); in ixp_tx_timestamp()
371 __raw_writel(TX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event); in ixp_tx_timestamp()
382 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) in hwtstamp_set()
383 return -EFAULT; in hwtstamp_set()
386 return -EINVAL; in hwtstamp_set()
388 ret = ixp46x_ptp_find(&port->timesync_regs, &port->phc_index); in hwtstamp_set()
393 regs = port->timesync_regs; in hwtstamp_set()
396 return -ERANGE; in hwtstamp_set()
400 port->hwts_rx_en = 0; in hwtstamp_set()
403 port->hwts_rx_en = PTP_SLAVE_MODE; in hwtstamp_set()
404 __raw_writel(0, ®s->channel[ch].ch_control); in hwtstamp_set()
407 port->hwts_rx_en = PTP_MASTER_MODE; in hwtstamp_set()
408 __raw_writel(MASTER_MODE, ®s->channel[ch].ch_control); in hwtstamp_set()
411 return -ERANGE; in hwtstamp_set()
414 port->hwts_tx_en = cfg.tx_type == HWTSTAMP_TX_ON; in hwtstamp_set()
418 ®s->channel[ch].ch_event); in hwtstamp_set()
420 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; in hwtstamp_set()
429 cfg.tx_type = port->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; in hwtstamp_get()
431 switch (port->hwts_rx_en) { in hwtstamp_get()
443 return -ERANGE; in hwtstamp_get()
446 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; in hwtstamp_get()
454 if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) { in ixp4xx_mdio_cmd()
455 printk(KERN_ERR "%s: MII not ready to transmit\n", bus->name); in ixp4xx_mdio_cmd()
456 return -1; in ixp4xx_mdio_cmd()
460 __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]); in ixp4xx_mdio_cmd()
461 __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]); in ixp4xx_mdio_cmd()
464 &mdio_regs->mdio_command[2]); in ixp4xx_mdio_cmd()
466 &mdio_regs->mdio_command[3]); in ixp4xx_mdio_cmd()
469 (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80)) { in ixp4xx_mdio_cmd()
475 printk(KERN_ERR "%s #%i: MII write failed\n", bus->name, in ixp4xx_mdio_cmd()
477 return -1; in ixp4xx_mdio_cmd()
481 printk(KERN_DEBUG "%s #%i: mdio_%s() took %i cycles\n", bus->name, in ixp4xx_mdio_cmd()
488 if (__raw_readl(&mdio_regs->mdio_status[3]) & 0x80) { in ixp4xx_mdio_cmd()
490 printk(KERN_DEBUG "%s #%i: MII read failed\n", bus->name, in ixp4xx_mdio_cmd()
496 return (__raw_readl(&mdio_regs->mdio_status[0]) & 0xFF) | in ixp4xx_mdio_cmd()
497 ((__raw_readl(&mdio_regs->mdio_status[1]) & 0xFF) << 8); in ixp4xx_mdio_cmd()
509 printk(KERN_DEBUG "%s #%i: MII read [%i] -> 0x%X\n", bus->name, in ixp4xx_mdio_read()
525 printk(KERN_DEBUG "%s #%i: MII write [%i] <- 0x%X, err = %i\n", in ixp4xx_mdio_write()
526 bus->name, phy_id, location, val, ret); in ixp4xx_mdio_write()
536 return -ENOMEM; in ixp4xx_mdio_register()
539 __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control); in ixp4xx_mdio_register()
540 mdio_bus->name = "IXP4xx MII Bus"; in ixp4xx_mdio_register()
541 mdio_bus->read = &ixp4xx_mdio_read; in ixp4xx_mdio_register()
542 mdio_bus->write = &ixp4xx_mdio_write; in ixp4xx_mdio_register()
543 snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "ixp4xx-eth-0"); in ixp4xx_mdio_register()
561 struct phy_device *phydev = dev->phydev; in ixp4xx_adjust_link()
563 if (!phydev->link) { in ixp4xx_adjust_link()
564 if (port->speed) { in ixp4xx_adjust_link()
565 port->speed = 0; in ixp4xx_adjust_link()
566 printk(KERN_INFO "%s: link down\n", dev->name); in ixp4xx_adjust_link()
571 if (port->speed == phydev->speed && port->duplex == phydev->duplex) in ixp4xx_adjust_link()
574 port->speed = phydev->speed; in ixp4xx_adjust_link()
575 port->duplex = phydev->duplex; in ixp4xx_adjust_link()
577 if (port->duplex) in ixp4xx_adjust_link()
579 &port->regs->tx_control[0]); in ixp4xx_adjust_link()
582 &port->regs->tx_control[0]); in ixp4xx_adjust_link()
585 dev->name, port->speed, port->duplex ? "full" : "half"); in ixp4xx_adjust_link()
613 phys, desc->next, desc->buf_len, desc->pkt_len, in debug_desc()
614 desc->data, desc->dest_id, desc->src_id, desc->flags, in debug_desc()
615 desc->qos, desc->padlen, desc->vlan_tci, in debug_desc()
616 desc->dst_mac_0, desc->dst_mac_1, desc->dst_mac_2, in debug_desc()
617 desc->dst_mac_3, desc->dst_mac_4, desc->dst_mac_5, in debug_desc()
618 desc->src_mac_0, desc->src_mac_1, desc->src_mac_2, in debug_desc()
619 desc->src_mac_3, desc->src_mac_4, desc->src_mac_5); in debug_desc()
630 return -1; in queue_get_desc()
632 phys &= ~0x1F; /* mask out non-address bits */ in queue_get_desc()
635 n_desc = (phys - tab_phys) / sizeof(struct desc); in queue_get_desc()
656 dma_unmap_single(&port->netdev->dev, desc->data, in dma_unmap_tx()
657 desc->buf_len, DMA_TO_DEVICE); in dma_unmap_tx()
659 dma_unmap_single(&port->netdev->dev, desc->data & ~3, in dma_unmap_tx()
660 ALIGN((desc->data & 3) + desc->buf_len, 4), in dma_unmap_tx()
672 printk(KERN_DEBUG "%s: eth_rx_irq\n", dev->name); in eth_rx_irq()
674 qmgr_disable_irq(port->plat->rxq); in eth_rx_irq()
675 napi_schedule(&port->napi); in eth_rx_irq()
681 struct net_device *dev = port->netdev; in eth_poll()
682 unsigned int rxq = port->plat->rxq, rxfreeq = RXFREE_QUEUE(port->id); in eth_poll()
722 phys = dma_map_single(&dev->dev, skb->data, in eth_poll()
724 if (dma_mapping_error(&dev->dev, phys)) { in eth_poll()
731 ALIGN(NET_IP_ALIGN + desc->pkt_len, 4)); in eth_poll()
735 dev->stats.rx_dropped++; in eth_poll()
736 /* put the desc back on RX-ready queue */ in eth_poll()
737 desc->buf_len = MAX_MRU; in eth_poll()
738 desc->pkt_len = 0; in eth_poll()
746 skb = port->rx_buff_tab[n]; in eth_poll()
747 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN, in eth_poll()
750 dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN, in eth_poll()
752 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], in eth_poll()
753 ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4); in eth_poll()
756 skb_put(skb, desc->pkt_len); in eth_poll()
758 debug_pkt(dev, "eth_poll", skb->data, skb->len); in eth_poll()
761 skb->protocol = eth_type_trans(skb, dev); in eth_poll()
762 dev->stats.rx_packets++; in eth_poll()
763 dev->stats.rx_bytes += skb->len; in eth_poll()
766 /* put the new buffer on RX-free queue */ in eth_poll()
768 port->rx_buff_tab[n] = temp; in eth_poll()
769 desc->data = phys + NET_IP_ALIGN; in eth_poll()
771 desc->buf_len = MAX_MRU; in eth_poll()
772 desc->pkt_len = 0; in eth_poll()
801 phys &= ~0x1F; /* mask out non-address bits */ in eth_txdone_irq()
802 n_desc = (phys - tx_desc_phys(port, 0)) / sizeof(struct desc); in eth_txdone_irq()
807 if (port->tx_buff_tab[n_desc]) { /* not the draining packet */ in eth_txdone_irq()
808 port->netdev->stats.tx_packets++; in eth_txdone_irq()
809 port->netdev->stats.tx_bytes += desc->pkt_len; in eth_txdone_irq()
814 port->netdev->name, port->tx_buff_tab[n_desc]); in eth_txdone_irq()
816 free_buffer_irq(port->tx_buff_tab[n_desc]); in eth_txdone_irq()
817 port->tx_buff_tab[n_desc] = NULL; in eth_txdone_irq()
820 start = qmgr_stat_below_low_watermark(port->plat->txreadyq); in eth_txdone_irq()
821 queue_put_desc(port->plat->txreadyq, phys, desc); in eth_txdone_irq()
822 if (start) { /* TX-ready queue was empty */ in eth_txdone_irq()
825 port->netdev->name); in eth_txdone_irq()
827 netif_wake_queue(port->netdev); in eth_txdone_irq()
835 unsigned int txreadyq = port->plat->txreadyq; in eth_xmit()
845 if (unlikely(skb->len > MAX_MRU)) { in eth_xmit()
847 dev->stats.tx_errors++; in eth_xmit()
851 debug_pkt(dev, "eth_xmit", skb->data, skb->len); in eth_xmit()
853 len = skb->len; in eth_xmit()
857 mem = skb->data; in eth_xmit()
859 offset = (uintptr_t)skb->data & 3; /* keep 32-bit alignment */ in eth_xmit()
863 dev->stats.tx_dropped++; in eth_xmit()
866 memcpy_swab32(mem, (u32 *)((uintptr_t)skb->data & ~3), bytes / 4); in eth_xmit()
869 phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE); in eth_xmit()
870 if (dma_mapping_error(&dev->dev, phys)) { in eth_xmit()
875 dev->stats.tx_dropped++; in eth_xmit()
884 port->tx_buff_tab[n] = skb; in eth_xmit()
886 port->tx_buff_tab[n] = mem; in eth_xmit()
888 desc->data = phys + offset; in eth_xmit()
889 desc->buf_len = desc->pkt_len = len; in eth_xmit()
891 /* NPE firmware pads short frames with zeros internally */ in eth_xmit()
893 queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc); in eth_xmit()
932 if ((dev->flags & IFF_ALLMULTI) && !(dev->flags & IFF_PROMISC)) { in eth_set_mcast_list()
934 __raw_writel(allmulti[i], &port->regs->mcast_addr[i]); in eth_set_mcast_list()
935 __raw_writel(allmulti[i], &port->regs->mcast_mask[i]); in eth_set_mcast_list()
938 &port->regs->rx_control[0]); in eth_set_mcast_list()
942 if ((dev->flags & IFF_PROMISC) || netdev_mc_empty(dev)) { in eth_set_mcast_list()
944 &port->regs->rx_control[0]); in eth_set_mcast_list()
953 addr = ha->addr; /* first MAC address */ in eth_set_mcast_list()
955 diffs[i] |= addr[i] ^ ha->addr[i]; in eth_set_mcast_list()
959 __raw_writel(addr[i], &port->regs->mcast_addr[i]); in eth_set_mcast_list()
960 __raw_writel(~diffs[i], &port->regs->mcast_mask[i]); in eth_set_mcast_list()
964 &port->regs->rx_control[0]); in eth_set_mcast_list()
971 return -EINVAL; in eth_ioctl()
980 return phy_mii_ioctl(dev->phydev, req, cmd); in eth_ioctl()
990 strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); in ixp4xx_get_drvinfo()
991 snprintf(info->fw_version, sizeof(info->fw_version), "%u:%u:%u:%u", in ixp4xx_get_drvinfo()
992 port->firmware[0], port->firmware[1], in ixp4xx_get_drvinfo()
993 port->firmware[2], port->firmware[3]); in ixp4xx_get_drvinfo()
994 strlcpy(info->bus_info, "internal", sizeof(info->bus_info)); in ixp4xx_get_drvinfo()
1002 if (port->phc_index < 0) in ixp4xx_get_ts_info()
1003 ixp46x_ptp_find(&port->timesync_regs, &port->phc_index); in ixp4xx_get_ts_info()
1005 info->phc_index = port->phc_index; in ixp4xx_get_ts_info()
1007 if (info->phc_index < 0) { in ixp4xx_get_ts_info()
1008 info->so_timestamping = in ixp4xx_get_ts_info()
1014 info->so_timestamping = in ixp4xx_get_ts_info()
1018 info->tx_types = in ixp4xx_get_ts_info()
1021 info->rx_filters = in ixp4xx_get_ts_info()
1042 err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0, in request_queues()
1043 "%s:RX-free", port->netdev->name); in request_queues()
1047 err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0, in request_queues()
1048 "%s:RX", port->netdev->name); in request_queues()
1052 err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0, in request_queues()
1053 "%s:TX", port->netdev->name); in request_queues()
1057 err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0, in request_queues()
1058 "%s:TX-ready", port->netdev->name); in request_queues()
1062 /* TX-done queue handles skbs sent out by the NPEs */ in request_queues()
1065 "%s:TX-done", DRV_NAME); in request_queues()
1072 qmgr_release_queue(port->plat->txreadyq); in request_queues()
1074 qmgr_release_queue(TX_QUEUE(port->id)); in request_queues()
1076 qmgr_release_queue(port->plat->rxq); in request_queues()
1078 qmgr_release_queue(RXFREE_QUEUE(port->id)); in request_queues()
1080 port->netdev->name); in request_queues()
1086 qmgr_release_queue(RXFREE_QUEUE(port->id)); in release_queues()
1087 qmgr_release_queue(port->plat->rxq); in release_queues()
1088 qmgr_release_queue(TX_QUEUE(port->id)); in release_queues()
1089 qmgr_release_queue(port->plat->txreadyq); in release_queues()
1100 dma_pool = dma_pool_create(DRV_NAME, &port->netdev->dev, in init_queues()
1103 return -ENOMEM; in init_queues()
1106 if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL, in init_queues()
1107 &port->desc_tab_phys))) in init_queues()
1108 return -ENOMEM; in init_queues()
1109 memset(port->desc_tab, 0, POOL_ALLOC_SIZE); in init_queues()
1110 memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */ in init_queues()
1111 memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab)); in init_queues()
1119 if (!(buff = netdev_alloc_skb(port->netdev, RX_BUFF_SIZE))) in init_queues()
1120 return -ENOMEM; in init_queues()
1121 data = buff->data; in init_queues()
1124 return -ENOMEM; in init_queues()
1127 desc->buf_len = MAX_MRU; in init_queues()
1128 desc->data = dma_map_single(&port->netdev->dev, data, in init_queues()
1130 if (dma_mapping_error(&port->netdev->dev, desc->data)) { in init_queues()
1132 return -EIO; in init_queues()
1134 desc->data += NET_IP_ALIGN; in init_queues()
1135 port->rx_buff_tab[i] = buff; in init_queues()
1145 if (port->desc_tab) { in destroy_queues()
1148 buffer_t *buff = port->rx_buff_tab[i]; in destroy_queues()
1150 dma_unmap_single(&port->netdev->dev, in destroy_queues()
1151 desc->data - NET_IP_ALIGN, in destroy_queues()
1158 buffer_t *buff = port->tx_buff_tab[i]; in destroy_queues()
1164 dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys); in destroy_queues()
1165 port->desc_tab = NULL; in destroy_queues()
1177 struct npe *npe = port->npe; in eth_open() local
1181 if (!npe_running(npe)) { in eth_open()
1182 err = npe_load_firmware(npe, npe_name(npe), &dev->dev); in eth_open()
1186 if (npe_recv_message(npe, &msg, "ETH_GET_STATUS")) { in eth_open()
1187 netdev_err(dev, "%s not responding\n", npe_name(npe)); in eth_open()
1188 return -EIO; in eth_open()
1190 port->firmware[0] = msg.byte4; in eth_open()
1191 port->firmware[1] = msg.byte5; in eth_open()
1192 port->firmware[2] = msg.byte6; in eth_open()
1193 port->firmware[3] = msg.byte7; in eth_open()
1198 msg.eth_id = port->id; in eth_open()
1199 msg.byte5 = port->plat->rxq | 0x80; in eth_open()
1200 msg.byte7 = port->plat->rxq << 4; in eth_open()
1203 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_RXQ")) in eth_open()
1204 return -EIO; in eth_open()
1208 msg.eth_id = PHYSICAL_ID(port->id); in eth_open()
1209 msg.byte2 = dev->dev_addr[0]; in eth_open()
1210 msg.byte3 = dev->dev_addr[1]; in eth_open()
1211 msg.byte4 = dev->dev_addr[2]; in eth_open()
1212 msg.byte5 = dev->dev_addr[3]; in eth_open()
1213 msg.byte6 = dev->dev_addr[4]; in eth_open()
1214 msg.byte7 = dev->dev_addr[5]; in eth_open()
1215 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_MAC")) in eth_open()
1216 return -EIO; in eth_open()
1220 msg.eth_id = port->id; in eth_open()
1221 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_FIREWALL_MODE")) in eth_open()
1222 return -EIO; in eth_open()
1233 port->speed = 0; /* force "link up" message */ in eth_open()
1234 phy_start(dev->phydev); in eth_open()
1237 __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]); in eth_open()
1238 __raw_writel(0x08, &port->regs->random_seed); in eth_open()
1239 __raw_writel(0x12, &port->regs->partial_empty_threshold); in eth_open()
1240 __raw_writel(0x30, &port->regs->partial_full_threshold); in eth_open()
1241 __raw_writel(0x08, &port->regs->tx_start_bytes); in eth_open()
1242 __raw_writel(0x15, &port->regs->tx_deferral); in eth_open()
1243 __raw_writel(0x08, &port->regs->tx_2part_deferral[0]); in eth_open()
1244 __raw_writel(0x07, &port->regs->tx_2part_deferral[1]); in eth_open()
1245 __raw_writel(0x80, &port->regs->slot_time); in eth_open()
1246 __raw_writel(0x01, &port->regs->int_clock_threshold); in eth_open()
1250 queue_put_desc(port->plat->txreadyq, in eth_open()
1254 queue_put_desc(RXFREE_QUEUE(port->id), in eth_open()
1257 __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]); in eth_open()
1258 __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]); in eth_open()
1259 __raw_writel(0, &port->regs->rx_control[1]); in eth_open()
1260 __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]); in eth_open()
1262 napi_enable(&port->napi); in eth_open()
1266 qmgr_set_irq(port->plat->rxq, QUEUE_IRQ_SRC_NOT_EMPTY, in eth_open()
1275 napi_schedule(&port->napi); in eth_open()
1286 ports_open--; in eth_close()
1287 qmgr_disable_irq(port->plat->rxq); in eth_close()
1288 napi_disable(&port->napi); in eth_close()
1291 while (queue_get_desc(RXFREE_QUEUE(port->id), port, 0) >= 0) in eth_close()
1292 buffs--; in eth_close()
1296 msg.eth_id = port->id; in eth_close()
1298 if (npe_send_recv_message(port->npe, &msg, "ETH_ENABLE_LOOPBACK")) in eth_close()
1303 while (queue_get_desc(port->plat->rxq, port, 0) >= 0) in eth_close()
1304 buffs--; in eth_close()
1307 if (qmgr_stat_empty(TX_QUEUE(port->id))) { in eth_close()
1311 int n = queue_get_desc(port->plat->txreadyq, port, 1); in eth_close()
1315 desc->buf_len = desc->pkt_len = 1; in eth_close()
1317 queue_put_desc(TX_QUEUE(port->id), phys, desc); in eth_close()
1324 " left in NPE\n", buffs); in eth_close()
1331 while (queue_get_desc(TX_QUEUE(port->id), port, 1) >= 0) in eth_close()
1332 buffs--; /* cancel TX */ in eth_close()
1336 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0) in eth_close()
1337 buffs--; in eth_close()
1344 "left in NPE\n", buffs); in eth_close()
1351 if (npe_send_recv_message(port->npe, &msg, "ETH_DISABLE_LOOPBACK")) in eth_close()
1354 phy_stop(dev->phydev); in eth_close()
1376 struct device_node *np = dev->of_node; in ixp4xx_of_get_platdata()
1387 ret = of_parse_phandle_with_fixed_args(np, "intel,npe-handle", 1, 0, in ixp4xx_of_get_platdata()
1390 dev_err(dev, "no NPE engine specified\n"); in ixp4xx_of_get_platdata()
1393 /* NPE ID 0x00, 0x10, 0x20... */ in ixp4xx_of_get_platdata()
1394 plat->npe = (npe_spec.args[0] << 4); in ixp4xx_of_get_platdata()
1399 plat->has_mdio = true; in ixp4xx_of_get_platdata()
1405 ret = of_parse_phandle_with_fixed_args(np, "queue-rx", 1, 0, in ixp4xx_of_get_platdata()
1411 plat->rxq = queue_spec.args[0]; in ixp4xx_of_get_platdata()
1414 ret = of_parse_phandle_with_fixed_args(np, "queue-txready", 1, 0, in ixp4xx_of_get_platdata()
1420 plat->txreadyq = queue_spec.args[0]; in ixp4xx_of_get_platdata()
1434 struct device *dev = &pdev->dev; in ixp4xx_eth_probe()
1435 struct device_node *np = dev->of_node; in ixp4xx_eth_probe()
1444 return -ENODEV; in ixp4xx_eth_probe()
1448 return -ENODEV; in ixp4xx_eth_probe()
1449 plat->npe = pdev->id; in ixp4xx_eth_probe()
1450 switch (plat->npe) { in ixp4xx_eth_probe()
1455 /* On all except IXP43x, NPE-B is used for the MDIO bus. in ixp4xx_eth_probe()
1456 * If there is no NPE-B in the feature set, bail out, in ixp4xx_eth_probe()
1462 return -ENODEV; in ixp4xx_eth_probe()
1463 /* Else register the MDIO bus on NPE-B */ in ixp4xx_eth_probe()
1464 plat->has_mdio = true; in ixp4xx_eth_probe()
1468 /* IXP43x lacks NPE-B and uses NPE-C for the MDIO bus in ixp4xx_eth_probe()
1469 * access, if there is no NPE-C, no bus, nothing works, in ixp4xx_eth_probe()
1475 return -ENODEV; in ixp4xx_eth_probe()
1476 /* Else register the MDIO bus on NPE-B */ in ixp4xx_eth_probe()
1477 plat->has_mdio = true; in ixp4xx_eth_probe()
1481 return -ENODEV; in ixp4xx_eth_probe()
1486 return -ENOMEM; in ixp4xx_eth_probe()
1490 port->netdev = ndev; in ixp4xx_eth_probe()
1491 port->id = plat->npe; in ixp4xx_eth_probe()
1492 port->phc_index = -1; in ixp4xx_eth_probe()
1495 port->regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); in ixp4xx_eth_probe()
1496 if (IS_ERR(port->regs)) in ixp4xx_eth_probe()
1497 return PTR_ERR(port->regs); in ixp4xx_eth_probe()
1500 if (plat->has_mdio) { in ixp4xx_eth_probe()
1501 err = ixp4xx_mdio_register(port->regs); in ixp4xx_eth_probe()
1511 return -EPROBE_DEFER; in ixp4xx_eth_probe()
1513 ndev->netdev_ops = &ixp4xx_netdev_ops; in ixp4xx_eth_probe()
1514 ndev->ethtool_ops = &ixp4xx_ethtool_ops; in ixp4xx_eth_probe()
1515 ndev->tx_queue_len = 100; in ixp4xx_eth_probe()
1517 ndev->dev.dma_mask = dev->dma_mask; in ixp4xx_eth_probe()
1518 ndev->dev.coherent_dma_mask = dev->coherent_dma_mask; in ixp4xx_eth_probe()
1520 netif_napi_add(ndev, &port->napi, eth_poll, NAPI_WEIGHT); in ixp4xx_eth_probe()
1522 if (!(port->npe = npe_request(NPE_ID(port->id)))) in ixp4xx_eth_probe()
1523 return -EIO; in ixp4xx_eth_probe()
1525 port->plat = plat; in ixp4xx_eth_probe()
1526 npe_port_tab[NPE_ID(port->id)] = port; in ixp4xx_eth_probe()
1527 memcpy(ndev->dev_addr, plat->hwaddr, ETH_ALEN); in ixp4xx_eth_probe()
1532 &port->regs->core_control); in ixp4xx_eth_probe()
1534 __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control); in ixp4xx_eth_probe()
1540 phydev = mdiobus_get_phy(mdio_bus, plat->phy); in ixp4xx_eth_probe()
1542 err = -ENODEV; in ixp4xx_eth_probe()
1553 err = -ENODEV; in ixp4xx_eth_probe()
1558 phydev->irq = PHY_POLL; in ixp4xx_eth_probe()
1563 netdev_info(ndev, "%s: MII PHY %i on %s\n", ndev->name, plat->phy, in ixp4xx_eth_probe()
1564 npe_name(port->npe)); in ixp4xx_eth_probe()
1571 npe_port_tab[NPE_ID(port->id)] = NULL; in ixp4xx_eth_probe()
1572 npe_release(port->npe); in ixp4xx_eth_probe()
1579 struct phy_device *phydev = ndev->phydev; in ixp4xx_eth_remove()
1585 npe_port_tab[NPE_ID(port->id)] = NULL; in ixp4xx_eth_remove()
1586 npe_release(port->npe); in ixp4xx_eth_remove()
1592 .compatible = "intel,ixp4xx-ethernet",