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/Linux-v5.15/drivers/s390/block/
Ddasd_proc.c1 // SPDX-License-Identifier: GPL-2.0
42 device = dasd_device_from_devindex((unsigned long) v - 1); in dasd_devices_show()
45 if (device->block) in dasd_devices_show()
46 block = device->block; in dasd_devices_show()
52 seq_printf(m, "%s", dev_name(&device->cdev->dev)); in dasd_devices_show()
54 if (device->discipline != NULL) in dasd_devices_show()
55 seq_printf(m, "(%s)", device->discipline->name); in dasd_devices_show()
59 if (block->gdp) in dasd_devices_show()
61 MAJOR(disk_devt(block->gdp)), in dasd_devices_show()
62 MINOR(disk_devt(block->gdp))); in dasd_devices_show()
[all …]
/Linux-v5.15/drivers/iio/afe/
Diio-rescale.c1 // SPDX-License-Identifier: GPL-2.0
47 if (rescale->chan_processed) in rescale_read_raw()
53 return iio_read_channel_processed(rescale->source, val); in rescale_read_raw()
55 return iio_read_channel_raw(rescale->source, val); in rescale_read_raw()
58 if (rescale->chan_processed) { in rescale_read_raw()
60 * Processed channels are scaled 1-to-1 in rescale_read_raw()
66 ret = iio_read_channel_scale(rescale->source, val, val2); in rescale_read_raw()
70 *val *= rescale->numerator; in rescale_read_raw()
71 *val2 *= rescale->denominator; in rescale_read_raw()
74 *val *= rescale->numerator; in rescale_read_raw()
[all …]
/Linux-v5.15/drivers/clk/mediatek/
Dclk-mt8173.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "clk-mtk.h"
12 #include "clk-gate.h"
13 #include "clk-cpumux.h"
15 #include <dt-bindings/clock/mt8173-clk.h>
36 FACTOR(CLK_TOP_ARMCA7PLL_754M, "armca7pll_754m", "armca7pll", 1, 2),
37 FACTOR(CLK_TOP_ARMCA7PLL_502M, "armca7pll_502m", "armca7pll", 1, 3),
39 FACTOR(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2),
40 FACTOR(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3),
41 FACTOR(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5),
[all …]
Dclk-mt8135.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <dt-bindings/clock/mt8135-clk.h>
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
20 FACTOR(CLK_TOP_DSI0_LNTC_DSICLK, "dsi0_lntc_dsiclk", "clk_null", 1, 1),
21 FACTOR(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_clkdig_cts", "clk_null", 1, 1),
22 FACTOR(CLK_TOP_CLKPH_MCK, "clkph_mck", "clk_null", 1, 1),
23 FACTOR(CLK_TOP_CPUM_TCK_IN, "cpum_tck_in", "clk_null", 1, 1),
27 FACTOR(CLK_TOP_MAINPLL_806M, "mainpll_806m", "mainpll", 1, 2),
28 FACTOR(CLK_TOP_MAINPLL_537P3M, "mainpll_537p3m", "mainpll", 1, 3),
[all …]
Dclk-mt6765.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
15 #include "clk-mtk.h"
16 #include "clk-gate.h"
17 #include "clk-mux.h"
19 #include <dt-bindings/clock/mt6765-clk.h>
82 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1),
83 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
84 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
85 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
[all …]
Dclk-mt2712.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include "clk-mtk.h"
17 #include "clk-gate.h"
19 #include <dt-bindings/clock/mt2712-clk.h>
39 FACTOR(CLK_TOP_SYS_26M, "sys_26m", "clk26m", 1,
41 FACTOR(CLK_TOP_CLK26M_D2, "clk26m_d2", "sys_26m", 1,
46 FACTOR(CLK_TOP_ARMCA35PLL, "armca35pll_ck", "armca35pll", 1,
48 FACTOR(CLK_TOP_ARMCA35PLL_600M, "armca35pll_600m", "armca35pll_ck", 1,
50 FACTOR(CLK_TOP_ARMCA35PLL_400M, "armca35pll_400m", "armca35pll_ck", 1,
52 FACTOR(CLK_TOP_ARMCA72PLL, "armca72pll_ck", "armca72pll", 1,
[all …]
Dclk-mt8516.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "clk-mtk.h"
15 #include "clk-gate.h"
17 #include <dt-bindings/clock/mt8516-clk.h>
28 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
29 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll", 1, 2),
30 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
31 FACTOR(CLK_TOP_MAINPLL_D8, "mainpll_d8", "mainpll", 1, 8),
32 FACTOR(CLK_TOP_MAINPLL_D16, "mainpll_d16", "mainpll", 1, 16),
33 FACTOR(CLK_TOP_MAINPLL_D11, "mainpll_d11", "mainpll", 1, 11),
[all …]
Dclk-mt8167.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "clk-mtk.h"
16 #include "clk-gate.h"
18 #include <dt-bindings/clock/mt8167-clk.h>
32 FACTOR(CLK_TOP_DMPLL, "dmpll_ck", "mempll", 1, 1),
33 FACTOR(CLK_TOP_MAINPLL_D2, "mainpll_d2", "mainpll", 1, 2),
34 FACTOR(CLK_TOP_MAINPLL_D4, "mainpll_d4", "mainpll", 1, 4),
35 FACTOR(CLK_TOP_MAINPLL_D8, "mainpll_d8", "mainpll", 1, 8),
36 FACTOR(CLK_TOP_MAINPLL_D16, "mainpll_d16", "mainpll", 1, 16),
37 FACTOR(CLK_TOP_MAINPLL_D11, "mainpll_d11", "mainpll", 1, 11),
[all …]
Dclk-mt6797.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Kevin Chen <kevin-cw.chen@mediatek.com>
12 #include "clk-mtk.h"
13 #include "clk-gate.h"
15 #include <dt-bindings/clock/mt6797-clk.h>
26 FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1, 1),
27 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
28 FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2),
29 FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4),
30 FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8),
[all …]
Dclk-mt2701.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 #include "clk-mtk.h"
14 #include "clk-gate.h"
15 #include "clk-cpumux.h"
17 #include <dt-bindings/clock/mt2701-clk.h>
58 FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1),
59 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2),
60 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
61 FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll", 1, 5),
[all …]
Dclk-mt8183.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "clk-mtk.h"
15 #include "clk-mux.h"
16 #include "clk-gate.h"
18 #include <dt-bindings/clock/mt8183-clk.h>
32 FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1, 2),
36 FACTOR(CLK_TOP_F26M_CK_D2, "csw_f26m_ck_d2", "clk26m", 1,
38 FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1,
40 FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "syspll_ck", 1,
42 FACTOR(CLK_TOP_SYSPLL_D2_D2, "syspll_d2_d2", "syspll_d2", 1,
[all …]
/Linux-v5.15/drivers/clk/mmp/
Dclk-frac.c2 * mmp factor clock operation source file
12 #include <linux/clk-provider.h>
19 * It is M/N clock
22 * numerator/denominator = Fin / (Fout * factor)
30 struct mmp_clk_factor *factor = to_clk_factor(hw); in clk_factor_round_rate() local
34 for (i = 0; i < factor->ftbl_cnt; i++) { in clk_factor_round_rate()
37 rate *= factor->ftbl[i].den; in clk_factor_round_rate()
38 do_div(rate, factor->ftbl[i].num * factor->masks->factor); in clk_factor_round_rate()
43 if ((i == 0) || (i == factor->ftbl_cnt)) { in clk_factor_round_rate()
46 if ((drate - prev_rate) > (rate - drate)) in clk_factor_round_rate()
[all …]
/Linux-v5.15/drivers/crypto/caam/
Dcaampkc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * caam - Freescale FSL CAAM support for Public Key Cryptography descriptors
18 * caam_priv_key_form - CAAM RSA private key representation
21 * 1. The first representation consists of the pair (n, d), where the
23 * n the RSA modulus
28 * p the first prime factor of the RSA modulus n
29 * q the second prime factor of the RSA modulus n
34 * p the first prime factor of the RSA modulus n
35 * q the second prime factor of the RSA modulus n
50 * caam_rsa_key - CAAM RSA key structure. Keys are allocated in DMA zone.
[all …]
/Linux-v5.15/fs/btrfs/
Dmisc.h1 /* SPDX-License-Identifier: GPL-2.0 */
35 static inline u64 div_factor(u64 num, int factor) in div_factor() argument
37 if (factor == 10) in div_factor()
39 num *= factor; in div_factor()
43 static inline u64 div_factor_fine(u64 num, int factor) in div_factor_fine() argument
45 if (factor == 100) in div_factor_fine()
47 num *= factor; in div_factor_fine()
52 static inline bool is_power_of_two_u64(u64 n) in is_power_of_two_u64() argument
54 return n != 0 && (n & (n - 1)) == 0; in is_power_of_two_u64()
57 static inline bool has_single_bit_set(u64 n) in has_single_bit_set() argument
[all …]
/Linux-v5.15/drivers/clk/actions/
Dowl-factor.c1 // SPDX-License-Identifier: GPL-2.0+
3 // OWL factor clock driver
6 // Author: David Liu <liuwei@actions-semi.com>
11 #include <linux/clk-provider.h>
15 #include "owl-factor.h"
22 for (clkt = table; clkt->div; clkt++) in _get_table_maxval()
23 if (clkt->val > maxval) in _get_table_maxval()
24 maxval = clkt->val; in _get_table_maxval()
33 for (clkt = table; clkt->div; clkt++) { in _get_table_div_mul()
34 if (clkt->val == val) { in _get_table_div_mul()
[all …]
/Linux-v5.15/tools/testing/selftests/syscall_user_dispatch/
Dsud_benchmark.c1 // SPDX-License-Identifier: GPL-2.0-only
37 * requires some per-architecture support (i.e. knowledge about the
39 * a small trampoline is open-coded for x86_64. Other architectures
65 int factor; variable
77 return (t2.tv_sec - t1.tv_sec) + 1.0e-9 * (t2.tv_nsec - t1.tv_nsec); in one_sysinfo_step()
84 printf("Calibrating test set to last ~%d seconds...\n", CALIBRATE_TO_SECS); in calibrate_set()
88 factor += CALIBRATE_TO_SECS; in calibrate_set()
91 printf("test iterations = %d\n", CALIBRATION_STEP * factor); in calibrate_set()
99 for (i = 0; i < factor; ++i) in perf_syscall()
100 partial += one_sysinfo_step()/(CALIBRATION_STEP*factor); in perf_syscall()
[all …]
/Linux-v5.15/drivers/media/test-drivers/vivid/
Dvivid-vid-out.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * vivid-vid-out.c - video output support functions.
12 #include <linux/v4l2-dv-timings.h>
13 #include <media/v4l2-common.h>
14 #include <media/v4l2-event.h>
15 #include <media/v4l2-dv-timings.h>
16 #include <media/v4l2-rect.h>
18 #include "vivid-core.h"
19 #include "vivid-vid-common.h"
20 #include "vivid-kthread-out.h"
[all …]
/Linux-v5.15/drivers/media/platform/ti-vpe/
Dsc.c1 // SPDX-License-Identifier: GPL-2.0-only
23 struct device *dev = &sc->pdev->dev; in sc_dump_regs()
25 #define DUMPREG(r) dev_dbg(dev, "%-35s %08x\n", #r, \ in sc_dump_regs()
26 ioread32(sc->base + CFG_##r)) in sc_dump_regs()
28 dev_dbg(dev, "SC Registers @ %pa:\n", &sc->res->start); in sc_dump_regs()
84 idx = HS_LT_9_16_SCALE + sixteenths - 8; in sc_set_hs_coeffs()
99 coeff_h += SC_NUM_TAPS_MEM_ALIGN - SC_H_NUM_TAPS; in sc_set_hs_coeffs()
102 sc->load_coeff_h = true; in sc_set_hs_coeffs()
127 idx = VS_LT_9_16_SCALE + sixteenths - 8; in sc_set_vs_coeffs()
140 coeff_v += SC_NUM_TAPS_MEM_ALIGN - SC_V_NUM_TAPS; in sc_set_vs_coeffs()
[all …]
/Linux-v5.15/drivers/clk/ti/
Dfixed-factor.c2 * TI Fixed Factor Clock
6 * Tero Kristo <t-kristo@ti.com>
18 #include <linux/clk-provider.h>
31 * of_ti_fixed_factor_clk_setup - Setup function for TI fixed factor clock
34 * Sets up a simple fixed factor clock based on device tree info.
39 const char *clk_name = node->name; in of_ti_fixed_factor_clk_setup()
44 if (of_property_read_u32(node, "ti,clock-div", &div)) { in of_ti_fixed_factor_clk_setup()
45 pr_err("%pOFn must have a clock-div property\n", node); in of_ti_fixed_factor_clk_setup()
49 if (of_property_read_u32(node, "ti,clock-mult", &mult)) { in of_ti_fixed_factor_clk_setup()
50 pr_err("%pOFn must have a clock-mult property\n", node); in of_ti_fixed_factor_clk_setup()
[all …]
/Linux-v5.15/drivers/media/platform/allegro-dvt/
Dnal-hevc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2020 Pengutronix, Michael Tretter <kernel@pengutronix.de>
7 * The conversion is defined in "ITU-T Rec. H.265 (02/2018) high efficiency
18 #include <linux/v4l2-controls.h>
24 #include "nal-hevc.h"
25 #include "nal-rbsp.h"
28 * See Rec. ITU-T H.265 (02/2018) Table 7-1 - NAL unit type codes and NAL unit
48 return -EINVAL; in nal_hevc_profile_from_v4l2()
61 return -EINVAL; in nal_hevc_tier_from_v4l2()
69 * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ] in nal_hevc_level_from_v4l2()
[all …]
/Linux-v5.15/tools/testing/selftests/kvm/x86_64/
Dvmx_nested_tsc_scaling_test.c1 // SPDX-License-Identifier: GPL-2.0-only
21 /* L2 is scaled up (from L1's perspective) by this factor */
24 #define TSC_OFFSET_L2 ((uint64_t) -33125236320908)
45 thresh_low = expected - tolerance; in compare_tsc_freq()
72 tsc_freq = tsc_end - tsc_start; in check_tsc_freq()
147 print_skip("Kernel does not use TSC clocksource - assuming that host TSC is not stable"); in stable_tsc_check_supported()
168 * We set L1's scale factor to be a random number from 2 to 10. in main()
169 * Ideally we would do the same for L2's factor but that one is in main()
175 printf("L1's scale down factor is: %"PRIu64"\n", l1_scale_factor); in main()
176 printf("L2's scale up factor is: %llu\n", L2_SCALE_FACTOR); in main()
[all …]
/Linux-v5.15/drivers/iio/adc/
Dad7292.c1 // SPDX-License-Identifier: GPL-2.0
91 st->d8[0] = AD7292_RD_FLAG_MSK(addr); in ad7292_spi_reg_read()
93 ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2); in ad7292_spi_reg_read()
97 return be16_to_cpu(st->d16); in ad7292_spi_reg_read()
103 unsigned int shift = 16 - (8 * len); in ad7292_spi_subreg_read()
106 st->d8[0] = AD7292_RD_FLAG_MSK(addr); in ad7292_spi_subreg_read()
107 st->d8[1] = sub_addr; in ad7292_spi_subreg_read()
109 ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len); in ad7292_spi_subreg_read()
113 return (be16_to_cpu(st->d16) >> shift); in ad7292_spi_subreg_read()
123 .tx_buf = &st->d8, in ad7292_single_conversion()
[all …]
/Linux-v5.15/drivers/clk/sunxi/
Dclk-factors.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Adjustable factor-based clock implementation
8 #include <linux/clk-provider.h>
16 #include "clk-factors.h"
19 * DOC: basic adjustable factor-based clock
22 * prepare - clk_prepare only ensures that parents are prepared
23 * enable - clk_enable only ensures that parents are enabled
24 * rate - rate is adjustable.
25 * clk->rate = (parent->rate * N * (K + 1) >> P) / (M + 1)
26 * parent - fixed parent. No clk_set_parent support
[all …]
/Linux-v5.15/drivers/thermal/
Damlogic_thermal.c1 // SPDX-License-Identifier: GPL-2.0+
10 * U = ---------, Uptat = ---------
11 * 2^16 1 + n * U
13 * Temperature = A * ( Uptat + u_efuse / 2^16 )- B
15 * A B m n : calibration parameters
74 * @n: calibration parameters
82 int n; member
116 pdata->data->calibration_parameters; in amlogic_thermal_code_to_millicelsius()
118 s64 factor, Uptat, uefuse; in amlogic_thermal_code_to_millicelsius() local
120 uefuse = pdata->trim_info & TSENSOR_TRIM_SIGN_MASK ? in amlogic_thermal_code_to_millicelsius()
[all …]
/Linux-v5.15/drivers/clocksource/
Dtimer-cadence-ttc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2013 Xilinx
22 * This driver configures the 2 16/32-bit count-up timers as follows:
29 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
33 * obtained from device tree. The pre-scaler of 32 is used.
54 * Setup the timers to use pre-scaling, using a fixed value for now that will
59 #define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1)
66 * struct ttc_timer - This definition defines local timer structure
104 * ttc_set_interval - Set the timer interval value
114 /* Disable the counter, set the counter value and re-enable counter */ in ttc_set_interval()
[all …]

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