1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2019-2020 Pengutronix, Michael Tretter <kernel@pengutronix.de>
7  * The conversion is defined in "ITU-T Rec. H.265 (02/2018) high efficiency
18 #include <linux/v4l2-controls.h>
24 #include "nal-hevc.h"
25 #include "nal-rbsp.h"
28  * See Rec. ITU-T H.265 (02/2018) Table 7-1 - NAL unit type codes and NAL unit
48 		return -EINVAL;  in nal_hevc_profile_from_v4l2()
61 		return -EINVAL;  in nal_hevc_tier_from_v4l2()
69 	 * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ]  in nal_hevc_level_from_v4l2()
73 	int factor = 30 / 10;  in nal_hevc_level_from_v4l2()  local
77 		return factor * 10;  in nal_hevc_level_from_v4l2()
79 		return factor * 20;  in nal_hevc_level_from_v4l2()
81 		return factor * 21;  in nal_hevc_level_from_v4l2()
83 		return factor * 30;  in nal_hevc_level_from_v4l2()
85 		return factor * 31;  in nal_hevc_level_from_v4l2()
87 		return factor * 40;  in nal_hevc_level_from_v4l2()
89 		return factor * 41;  in nal_hevc_level_from_v4l2()
91 		return factor * 50;  in nal_hevc_level_from_v4l2()
93 		return factor * 51;  in nal_hevc_level_from_v4l2()
95 		return factor * 52;  in nal_hevc_level_from_v4l2()
97 		return factor * 60;  in nal_hevc_level_from_v4l2()
99 		return factor * 61;  in nal_hevc_level_from_v4l2()
101 		return factor * 62;  in nal_hevc_level_from_v4l2()
103 		return -EINVAL;  in nal_hevc_level_from_v4l2()
110 	u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8);  in nal_hevc_write_start_code_prefix()
113 	if (DIV_ROUND_UP(rbsp->pos, 8) + i > rbsp->size) {  in nal_hevc_write_start_code_prefix()
114 		rbsp->error = -EINVAL;  in nal_hevc_write_start_code_prefix()
123 	rbsp->pos += i * 8;  in nal_hevc_write_start_code_prefix()
128 	u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8);  in nal_hevc_read_start_code_prefix()
131 	if (DIV_ROUND_UP(rbsp->pos, 8) + i > rbsp->size) {  in nal_hevc_read_start_code_prefix()
132 		rbsp->error = -EINVAL;  in nal_hevc_read_start_code_prefix()
137 		rbsp->error = -EINVAL;  in nal_hevc_read_start_code_prefix()
141 	rbsp->pos += i * 8;  in nal_hevc_read_start_code_prefix()
146 	u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8);  in nal_hevc_write_filler_data()
150 	i = rbsp->size - DIV_ROUND_UP(rbsp->pos, 8) - 1;  in nal_hevc_write_filler_data()
152 	rbsp->pos += i * 8;  in nal_hevc_write_filler_data()
157 	u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8);  in nal_hevc_read_filler_data()
160 		if (DIV_ROUND_UP(rbsp->pos, 8) > rbsp->size) {  in nal_hevc_read_filler_data()
161 			rbsp->error = -EINVAL;  in nal_hevc_read_filler_data()
166 		rbsp->pos += 8;  in nal_hevc_read_filler_data()
176 	rbsp_bits(rbsp, 2, &ptl->general_profile_space);  in nal_hevc_rbsp_profile_tier_level()
177 	rbsp_bit(rbsp, &ptl->general_tier_flag);  in nal_hevc_rbsp_profile_tier_level()
178 	rbsp_bits(rbsp, 5, &ptl->general_profile_idc);  in nal_hevc_rbsp_profile_tier_level()
180 		rbsp_bit(rbsp, &ptl->general_profile_compatibility_flag[i]);  in nal_hevc_rbsp_profile_tier_level()
181 	rbsp_bit(rbsp, &ptl->general_progressive_source_flag);  in nal_hevc_rbsp_profile_tier_level()
182 	rbsp_bit(rbsp, &ptl->general_interlaced_source_flag);  in nal_hevc_rbsp_profile_tier_level()
183 	rbsp_bit(rbsp, &ptl->general_non_packed_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
184 	rbsp_bit(rbsp, &ptl->general_frame_only_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
185 	if (ptl->general_profile_idc == 4 ||  in nal_hevc_rbsp_profile_tier_level()
186 	    ptl->general_profile_compatibility_flag[4] ||  in nal_hevc_rbsp_profile_tier_level()
187 	    ptl->general_profile_idc == 5 ||  in nal_hevc_rbsp_profile_tier_level()
188 	    ptl->general_profile_compatibility_flag[5] ||  in nal_hevc_rbsp_profile_tier_level()
189 	    ptl->general_profile_idc == 6 ||  in nal_hevc_rbsp_profile_tier_level()
190 	    ptl->general_profile_compatibility_flag[6] ||  in nal_hevc_rbsp_profile_tier_level()
191 	    ptl->general_profile_idc == 7 ||  in nal_hevc_rbsp_profile_tier_level()
192 	    ptl->general_profile_compatibility_flag[7] ||  in nal_hevc_rbsp_profile_tier_level()
193 	    ptl->general_profile_idc == 8 ||  in nal_hevc_rbsp_profile_tier_level()
194 	    ptl->general_profile_compatibility_flag[8] ||  in nal_hevc_rbsp_profile_tier_level()
195 	    ptl->general_profile_idc == 9 ||  in nal_hevc_rbsp_profile_tier_level()
196 	    ptl->general_profile_compatibility_flag[9] ||  in nal_hevc_rbsp_profile_tier_level()
197 	    ptl->general_profile_idc == 10 ||  in nal_hevc_rbsp_profile_tier_level()
198 	    ptl->general_profile_compatibility_flag[10]) {  in nal_hevc_rbsp_profile_tier_level()
199 		rbsp_bit(rbsp, &ptl->general_max_12bit_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
200 		rbsp_bit(rbsp, &ptl->general_max_10bit_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
201 		rbsp_bit(rbsp, &ptl->general_max_8bit_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
202 		rbsp_bit(rbsp, &ptl->general_max_422chroma_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
203 		rbsp_bit(rbsp, &ptl->general_max_420chroma_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
204 		rbsp_bit(rbsp, &ptl->general_max_monochrome_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
205 		rbsp_bit(rbsp, &ptl->general_intra_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
206 		rbsp_bit(rbsp, &ptl->general_one_picture_only_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
207 		rbsp_bit(rbsp, &ptl->general_lower_bit_rate_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
208 		if (ptl->general_profile_idc == 5 ||  in nal_hevc_rbsp_profile_tier_level()
209 		    ptl->general_profile_compatibility_flag[5] ||  in nal_hevc_rbsp_profile_tier_level()
210 		    ptl->general_profile_idc == 9 ||  in nal_hevc_rbsp_profile_tier_level()
211 		    ptl->general_profile_compatibility_flag[9] ||  in nal_hevc_rbsp_profile_tier_level()
212 		    ptl->general_profile_idc == 10 ||  in nal_hevc_rbsp_profile_tier_level()
213 		    ptl->general_profile_compatibility_flag[10]) {  in nal_hevc_rbsp_profile_tier_level()
214 			rbsp_bit(rbsp, &ptl->general_max_14bit_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
215 			rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_33bits);  in nal_hevc_rbsp_profile_tier_level()
216 			rbsp_bits(rbsp, 33 - 32, &ptl->general_reserved_zero_33bits);  in nal_hevc_rbsp_profile_tier_level()
218 			rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_34bits);  in nal_hevc_rbsp_profile_tier_level()
219 			rbsp_bits(rbsp, 34 - 2, &ptl->general_reserved_zero_34bits);  in nal_hevc_rbsp_profile_tier_level()
221 	} else if (ptl->general_profile_idc == 2 ||  in nal_hevc_rbsp_profile_tier_level()
222 		   ptl->general_profile_compatibility_flag[2]) {  in nal_hevc_rbsp_profile_tier_level()
223 		rbsp_bits(rbsp, 7, &ptl->general_reserved_zero_7bits);  in nal_hevc_rbsp_profile_tier_level()
224 		rbsp_bit(rbsp, &ptl->general_one_picture_only_constraint_flag);  in nal_hevc_rbsp_profile_tier_level()
225 		rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_35bits);  in nal_hevc_rbsp_profile_tier_level()
226 		rbsp_bits(rbsp, 35 - 32, &ptl->general_reserved_zero_35bits);  in nal_hevc_rbsp_profile_tier_level()
228 		rbsp_bits(rbsp, 32, &ptl->general_reserved_zero_43bits);  in nal_hevc_rbsp_profile_tier_level()
229 		rbsp_bits(rbsp, 43 - 32, &ptl->general_reserved_zero_43bits);  in nal_hevc_rbsp_profile_tier_level()
231 	if ((ptl->general_profile_idc >= 1 && ptl->general_profile_idc <= 5) ||  in nal_hevc_rbsp_profile_tier_level()
232 	    ptl->general_profile_idc == 9 ||  in nal_hevc_rbsp_profile_tier_level()
233 	    ptl->general_profile_compatibility_flag[1] ||  in nal_hevc_rbsp_profile_tier_level()
234 	    ptl->general_profile_compatibility_flag[2] ||  in nal_hevc_rbsp_profile_tier_level()
235 	    ptl->general_profile_compatibility_flag[3] ||  in nal_hevc_rbsp_profile_tier_level()
236 	    ptl->general_profile_compatibility_flag[4] ||  in nal_hevc_rbsp_profile_tier_level()
237 	    ptl->general_profile_compatibility_flag[5] ||  in nal_hevc_rbsp_profile_tier_level()
238 	    ptl->general_profile_compatibility_flag[9])  in nal_hevc_rbsp_profile_tier_level()
239 		rbsp_bit(rbsp, &ptl->general_inbld_flag);  in nal_hevc_rbsp_profile_tier_level()
241 		rbsp_bit(rbsp, &ptl->general_reserved_zero_bit);  in nal_hevc_rbsp_profile_tier_level()
242 	rbsp_bits(rbsp, 8, &ptl->general_level_idc);  in nal_hevc_rbsp_profile_tier_level()
252 	rbsp_bits(rbsp, 4, &vps->video_parameter_set_id);  in nal_hevc_rbsp_vps()
253 	rbsp_bit(rbsp, &vps->base_layer_internal_flag);  in nal_hevc_rbsp_vps()
254 	rbsp_bit(rbsp, &vps->base_layer_available_flag);  in nal_hevc_rbsp_vps()
255 	rbsp_bits(rbsp, 6, &vps->max_layers_minus1);  in nal_hevc_rbsp_vps()
256 	rbsp_bits(rbsp, 3, &vps->max_sub_layers_minus1);  in nal_hevc_rbsp_vps()
257 	rbsp_bits(rbsp, 1, &vps->temporal_id_nesting_flag);  in nal_hevc_rbsp_vps()
259 	nal_hevc_rbsp_profile_tier_level(rbsp, &vps->profile_tier_level);  in nal_hevc_rbsp_vps()
260 	rbsp_bit(rbsp, &vps->sub_layer_ordering_info_present_flag);  in nal_hevc_rbsp_vps()
261 	for (i = vps->sub_layer_ordering_info_present_flag ? 0 : vps->max_sub_layers_minus1;  in nal_hevc_rbsp_vps()
262 	     i <= vps->max_sub_layers_minus1; i++) {  in nal_hevc_rbsp_vps()
263 		rbsp_uev(rbsp, &vps->max_dec_pic_buffering_minus1[i]);  in nal_hevc_rbsp_vps()
264 		rbsp_uev(rbsp, &vps->max_num_reorder_pics[i]);  in nal_hevc_rbsp_vps()
265 		rbsp_uev(rbsp, &vps->max_latency_increase_plus1[i]);  in nal_hevc_rbsp_vps()
267 	rbsp_bits(rbsp, 6, &vps->max_layer_id);  in nal_hevc_rbsp_vps()
268 	rbsp_uev(rbsp, &vps->num_layer_sets_minus1);  in nal_hevc_rbsp_vps()
269 	for (i = 0; i <= vps->num_layer_sets_minus1; i++)  in nal_hevc_rbsp_vps()
270 		for (j = 0; j <= vps->max_layer_id; j++)  in nal_hevc_rbsp_vps()
271 			rbsp_bit(rbsp, &vps->layer_id_included_flag[i][j]);  in nal_hevc_rbsp_vps()
272 	rbsp_bit(rbsp, &vps->timing_info_present_flag);  in nal_hevc_rbsp_vps()
273 	if (vps->timing_info_present_flag)  in nal_hevc_rbsp_vps()
275 	rbsp_bit(rbsp, &vps->extension_flag);  in nal_hevc_rbsp_vps()
276 	if (vps->extension_flag)  in nal_hevc_rbsp_vps()
284 	rbsp_bits(rbsp, 4, &sps->video_parameter_set_id);  in nal_hevc_rbsp_sps()
285 	rbsp_bits(rbsp, 3, &sps->max_sub_layers_minus1);  in nal_hevc_rbsp_sps()
286 	rbsp_bit(rbsp, &sps->temporal_id_nesting_flag);  in nal_hevc_rbsp_sps()
287 	nal_hevc_rbsp_profile_tier_level(rbsp, &sps->profile_tier_level);  in nal_hevc_rbsp_sps()
288 	rbsp_uev(rbsp, &sps->seq_parameter_set_id);  in nal_hevc_rbsp_sps()
290 	rbsp_uev(rbsp, &sps->chroma_format_idc);  in nal_hevc_rbsp_sps()
291 	if (sps->chroma_format_idc == 3)  in nal_hevc_rbsp_sps()
292 		rbsp_bit(rbsp, &sps->separate_colour_plane_flag);  in nal_hevc_rbsp_sps()
293 	rbsp_uev(rbsp, &sps->pic_width_in_luma_samples);  in nal_hevc_rbsp_sps()
294 	rbsp_uev(rbsp, &sps->pic_height_in_luma_samples);  in nal_hevc_rbsp_sps()
295 	rbsp_bit(rbsp, &sps->conformance_window_flag);  in nal_hevc_rbsp_sps()
296 	if (sps->conformance_window_flag) {  in nal_hevc_rbsp_sps()
297 		rbsp_uev(rbsp, &sps->conf_win_left_offset);  in nal_hevc_rbsp_sps()
298 		rbsp_uev(rbsp, &sps->conf_win_right_offset);  in nal_hevc_rbsp_sps()
299 		rbsp_uev(rbsp, &sps->conf_win_top_offset);  in nal_hevc_rbsp_sps()
300 		rbsp_uev(rbsp, &sps->conf_win_bottom_offset);  in nal_hevc_rbsp_sps()
302 	rbsp_uev(rbsp, &sps->bit_depth_luma_minus8);  in nal_hevc_rbsp_sps()
303 	rbsp_uev(rbsp, &sps->bit_depth_chroma_minus8);  in nal_hevc_rbsp_sps()
305 	rbsp_uev(rbsp, &sps->log2_max_pic_order_cnt_lsb_minus4);  in nal_hevc_rbsp_sps()
307 	rbsp_bit(rbsp, &sps->sub_layer_ordering_info_present_flag);  in nal_hevc_rbsp_sps()
308 	for (i = (sps->sub_layer_ordering_info_present_flag ? 0 : sps->max_sub_layers_minus1);  in nal_hevc_rbsp_sps()
309 	     i <= sps->max_sub_layers_minus1; i++) {  in nal_hevc_rbsp_sps()
310 		rbsp_uev(rbsp, &sps->max_dec_pic_buffering_minus1[i]);  in nal_hevc_rbsp_sps()
311 		rbsp_uev(rbsp, &sps->max_num_reorder_pics[i]);  in nal_hevc_rbsp_sps()
312 		rbsp_uev(rbsp, &sps->max_latency_increase_plus1[i]);  in nal_hevc_rbsp_sps()
314 	rbsp_uev(rbsp, &sps->log2_min_luma_coding_block_size_minus3);  in nal_hevc_rbsp_sps()
315 	rbsp_uev(rbsp, &sps->log2_diff_max_min_luma_coding_block_size);  in nal_hevc_rbsp_sps()
316 	rbsp_uev(rbsp, &sps->log2_min_luma_transform_block_size_minus2);  in nal_hevc_rbsp_sps()
317 	rbsp_uev(rbsp, &sps->log2_diff_max_min_luma_transform_block_size);  in nal_hevc_rbsp_sps()
318 	rbsp_uev(rbsp, &sps->max_transform_hierarchy_depth_inter);  in nal_hevc_rbsp_sps()
319 	rbsp_uev(rbsp, &sps->max_transform_hierarchy_depth_intra);  in nal_hevc_rbsp_sps()
321 	rbsp_bit(rbsp, &sps->scaling_list_enabled_flag);  in nal_hevc_rbsp_sps()
322 	if (sps->scaling_list_enabled_flag)  in nal_hevc_rbsp_sps()
325 	rbsp_bit(rbsp, &sps->amp_enabled_flag);  in nal_hevc_rbsp_sps()
326 	rbsp_bit(rbsp, &sps->sample_adaptive_offset_enabled_flag);  in nal_hevc_rbsp_sps()
327 	rbsp_bit(rbsp, &sps->pcm_enabled_flag);  in nal_hevc_rbsp_sps()
328 	if (sps->pcm_enabled_flag) {  in nal_hevc_rbsp_sps()
329 		rbsp_bits(rbsp, 4, &sps->pcm_sample_bit_depth_luma_minus1);  in nal_hevc_rbsp_sps()
330 		rbsp_bits(rbsp, 4, &sps->pcm_sample_bit_depth_chroma_minus1);  in nal_hevc_rbsp_sps()
331 		rbsp_uev(rbsp, &sps->log2_min_pcm_luma_coding_block_size_minus3);  in nal_hevc_rbsp_sps()
332 		rbsp_uev(rbsp, &sps->log2_diff_max_min_pcm_luma_coding_block_size);  in nal_hevc_rbsp_sps()
333 		rbsp_bit(rbsp, &sps->pcm_loop_filter_disabled_flag);  in nal_hevc_rbsp_sps()
336 	rbsp_uev(rbsp, &sps->num_short_term_ref_pic_sets);  in nal_hevc_rbsp_sps()
337 	if (sps->num_short_term_ref_pic_sets > 0)  in nal_hevc_rbsp_sps()
340 	rbsp_bit(rbsp, &sps->long_term_ref_pics_present_flag);  in nal_hevc_rbsp_sps()
341 	if (sps->long_term_ref_pics_present_flag)  in nal_hevc_rbsp_sps()
344 	rbsp_bit(rbsp, &sps->sps_temporal_mvp_enabled_flag);  in nal_hevc_rbsp_sps()
345 	rbsp_bit(rbsp, &sps->strong_intra_smoothing_enabled_flag);  in nal_hevc_rbsp_sps()
346 	rbsp_bit(rbsp, &sps->vui_parameters_present_flag);  in nal_hevc_rbsp_sps()
347 	if (sps->vui_parameters_present_flag)  in nal_hevc_rbsp_sps()
350 	rbsp_bit(rbsp, &sps->extension_present_flag);  in nal_hevc_rbsp_sps()
351 	if (sps->extension_present_flag) {  in nal_hevc_rbsp_sps()
352 		rbsp_bit(rbsp, &sps->sps_range_extension_flag);  in nal_hevc_rbsp_sps()
353 		rbsp_bit(rbsp, &sps->sps_multilayer_extension_flag);  in nal_hevc_rbsp_sps()
354 		rbsp_bit(rbsp, &sps->sps_3d_extension_flag);  in nal_hevc_rbsp_sps()
355 		rbsp_bit(rbsp, &sps->sps_scc_extension_flag);  in nal_hevc_rbsp_sps()
356 		rbsp_bits(rbsp, 5, &sps->sps_extension_4bits);  in nal_hevc_rbsp_sps()
358 	if (sps->sps_range_extension_flag)  in nal_hevc_rbsp_sps()
360 	if (sps->sps_multilayer_extension_flag)  in nal_hevc_rbsp_sps()
362 	if (sps->sps_3d_extension_flag)  in nal_hevc_rbsp_sps()
364 	if (sps->sps_scc_extension_flag)  in nal_hevc_rbsp_sps()
366 	if (sps->sps_extension_4bits)  in nal_hevc_rbsp_sps()
374 	rbsp_uev(rbsp, &pps->pps_pic_parameter_set_id);  in nal_hevc_rbsp_pps()
375 	rbsp_uev(rbsp, &pps->pps_seq_parameter_set_id);  in nal_hevc_rbsp_pps()
376 	rbsp_bit(rbsp, &pps->dependent_slice_segments_enabled_flag);  in nal_hevc_rbsp_pps()
377 	rbsp_bit(rbsp, &pps->output_flag_present_flag);  in nal_hevc_rbsp_pps()
378 	rbsp_bits(rbsp, 3, &pps->num_extra_slice_header_bits);  in nal_hevc_rbsp_pps()
379 	rbsp_bit(rbsp, &pps->sign_data_hiding_enabled_flag);  in nal_hevc_rbsp_pps()
380 	rbsp_bit(rbsp, &pps->cabac_init_present_flag);  in nal_hevc_rbsp_pps()
381 	rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1);  in nal_hevc_rbsp_pps()
382 	rbsp_uev(rbsp, &pps->num_ref_idx_l1_default_active_minus1);  in nal_hevc_rbsp_pps()
383 	rbsp_sev(rbsp, &pps->init_qp_minus26);  in nal_hevc_rbsp_pps()
384 	rbsp_bit(rbsp, &pps->constrained_intra_pred_flag);  in nal_hevc_rbsp_pps()
385 	rbsp_bit(rbsp, &pps->transform_skip_enabled_flag);  in nal_hevc_rbsp_pps()
386 	rbsp_bit(rbsp, &pps->cu_qp_delta_enabled_flag);  in nal_hevc_rbsp_pps()
387 	if (pps->cu_qp_delta_enabled_flag)  in nal_hevc_rbsp_pps()
388 		rbsp_uev(rbsp, &pps->diff_cu_qp_delta_depth);  in nal_hevc_rbsp_pps()
389 	rbsp_sev(rbsp, &pps->pps_cb_qp_offset);  in nal_hevc_rbsp_pps()
390 	rbsp_sev(rbsp, &pps->pps_cr_qp_offset);  in nal_hevc_rbsp_pps()
391 	rbsp_bit(rbsp, &pps->pps_slice_chroma_qp_offsets_present_flag);  in nal_hevc_rbsp_pps()
392 	rbsp_bit(rbsp, &pps->weighted_pred_flag);  in nal_hevc_rbsp_pps()
393 	rbsp_bit(rbsp, &pps->weighted_bipred_flag);  in nal_hevc_rbsp_pps()
394 	rbsp_bit(rbsp, &pps->transquant_bypass_enabled_flag);  in nal_hevc_rbsp_pps()
395 	rbsp_bit(rbsp, &pps->tiles_enabled_flag);  in nal_hevc_rbsp_pps()
396 	rbsp_bit(rbsp, &pps->entropy_coding_sync_enabled_flag);  in nal_hevc_rbsp_pps()
397 	if (pps->tiles_enabled_flag) {  in nal_hevc_rbsp_pps()
398 		rbsp_uev(rbsp, &pps->num_tile_columns_minus1);  in nal_hevc_rbsp_pps()
399 		rbsp_uev(rbsp, &pps->num_tile_rows_minus1);  in nal_hevc_rbsp_pps()
400 		rbsp_bit(rbsp, &pps->uniform_spacing_flag);  in nal_hevc_rbsp_pps()
401 		if (!pps->uniform_spacing_flag) {  in nal_hevc_rbsp_pps()
402 			for (i = 0; i < pps->num_tile_columns_minus1; i++)  in nal_hevc_rbsp_pps()
403 				rbsp_uev(rbsp, &pps->column_width_minus1[i]);  in nal_hevc_rbsp_pps()
404 			for (i = 0; i < pps->num_tile_rows_minus1; i++)  in nal_hevc_rbsp_pps()
405 				rbsp_uev(rbsp, &pps->row_height_minus1[i]);  in nal_hevc_rbsp_pps()
407 		rbsp_bit(rbsp, &pps->loop_filter_across_tiles_enabled_flag);  in nal_hevc_rbsp_pps()
409 	rbsp_bit(rbsp, &pps->pps_loop_filter_across_slices_enabled_flag);  in nal_hevc_rbsp_pps()
410 	rbsp_bit(rbsp, &pps->deblocking_filter_control_present_flag);  in nal_hevc_rbsp_pps()
411 	if (pps->deblocking_filter_control_present_flag) {  in nal_hevc_rbsp_pps()
412 		rbsp_bit(rbsp, &pps->deblocking_filter_override_enabled_flag);  in nal_hevc_rbsp_pps()
413 		rbsp_bit(rbsp, &pps->pps_deblocking_filter_disabled_flag);  in nal_hevc_rbsp_pps()
414 		if (!pps->pps_deblocking_filter_disabled_flag) {  in nal_hevc_rbsp_pps()
415 			rbsp_sev(rbsp, &pps->pps_beta_offset_div2);  in nal_hevc_rbsp_pps()
416 			rbsp_sev(rbsp, &pps->pps_tc_offset_div2);  in nal_hevc_rbsp_pps()
419 	rbsp_bit(rbsp, &pps->pps_scaling_list_data_present_flag);  in nal_hevc_rbsp_pps()
420 	if (pps->pps_scaling_list_data_present_flag)  in nal_hevc_rbsp_pps()
422 	rbsp_bit(rbsp, &pps->lists_modification_present_flag);  in nal_hevc_rbsp_pps()
423 	rbsp_uev(rbsp, &pps->log2_parallel_merge_level_minus2);  in nal_hevc_rbsp_pps()
424 	rbsp_bit(rbsp, &pps->slice_segment_header_extension_present_flag);  in nal_hevc_rbsp_pps()
425 	rbsp_bit(rbsp, &pps->pps_extension_present_flag);  in nal_hevc_rbsp_pps()
426 	if (pps->pps_extension_present_flag) {  in nal_hevc_rbsp_pps()
427 		rbsp_bit(rbsp, &pps->pps_range_extension_flag);  in nal_hevc_rbsp_pps()
428 		rbsp_bit(rbsp, &pps->pps_multilayer_extension_flag);  in nal_hevc_rbsp_pps()
429 		rbsp_bit(rbsp, &pps->pps_3d_extension_flag);  in nal_hevc_rbsp_pps()
430 		rbsp_bit(rbsp, &pps->pps_scc_extension_flag);  in nal_hevc_rbsp_pps()
431 		rbsp_bits(rbsp, 4, &pps->pps_extension_4bits);  in nal_hevc_rbsp_pps()
433 	if (pps->pps_range_extension_flag)  in nal_hevc_rbsp_pps()
435 	if (pps->pps_multilayer_extension_flag)  in nal_hevc_rbsp_pps()
437 	if (pps->pps_3d_extension_flag)  in nal_hevc_rbsp_pps()
439 	if (pps->pps_scc_extension_flag)  in nal_hevc_rbsp_pps()
441 	if (pps->pps_extension_4bits)  in nal_hevc_rbsp_pps()
446  * nal_hevc_write_vps() - Write PPS NAL unit into RBSP format
449  * @n: maximum size of @dest in bytes
460 			   void *dest, size_t n, struct nal_hevc_vps *vps)  in nal_hevc_write_vps()
469 		return -EINVAL;  in nal_hevc_write_vps()
471 	rbsp_init(&rbsp, dest, n, &write);  in nal_hevc_write_vps()
493  * nal_hevc_read_vps() - Read VPS NAL unit from RBSP format
497  * @n: size of @src in bytes
504 			  struct nal_hevc_vps *vps, void *src, size_t n)  in nal_hevc_read_vps()
513 		return -EINVAL;  in nal_hevc_read_vps()
515 	rbsp_init(&rbsp, src, n, &read);  in nal_hevc_read_vps()
527 		return -EINVAL;  in nal_hevc_read_vps()
541  * nal_hevc_write_sps() - Write SPS NAL unit into RBSP format
544  * @n: maximum size of @dest in bytes
555 			   void *dest, size_t n, struct nal_hevc_sps *sps)  in nal_hevc_write_sps()
564 		return -EINVAL;  in nal_hevc_write_sps()
566 	rbsp_init(&rbsp, dest, n, &write);  in nal_hevc_write_sps()
588  * nal_hevc_read_sps() - Read SPS NAL unit from RBSP format
592  * @n: size of @src in bytes
599 			  struct nal_hevc_sps *sps, void *src, size_t n)  in nal_hevc_read_sps()
608 		return -EINVAL;  in nal_hevc_read_sps()
610 	rbsp_init(&rbsp, src, n, &read);  in nal_hevc_read_sps()
622 		return -EINVAL;  in nal_hevc_read_sps()
636  * nal_hevc_write_pps() - Write PPS NAL unit into RBSP format
639  * @n: maximum size of @dest in bytes
650 			   void *dest, size_t n, struct nal_hevc_pps *pps)  in nal_hevc_write_pps()
659 		return -EINVAL;  in nal_hevc_write_pps()
661 	rbsp_init(&rbsp, dest, n, &write);  in nal_hevc_write_pps()
683  * nal_hevc_read_pps() - Read PPS NAL unit from RBSP format
687  * @n: size of @src in bytes
694 			  struct nal_hevc_pps *pps, void *src, size_t n)  in nal_hevc_read_pps()
703 		return -EINVAL;  in nal_hevc_read_pps()
705 	rbsp_init(&rbsp, src, n, &read);  in nal_hevc_read_pps()
727  * nal_hevc_write_filler() - Write filler data RBSP
730  * @n: size of the buffer to fill with filler data
732  * Write a filler data RBSP to @dest with a size of @n bytes and return the
738  * The RBSP format of the filler data is specified in Rec. ITU-T H.265
743 ssize_t nal_hevc_write_filler(const struct device *dev, void *dest, size_t n)  in nal_hevc_write_filler()  argument
752 		return -EINVAL;  in nal_hevc_write_filler()
754 	rbsp_init(&rbsp, dest, n, &write);  in nal_hevc_write_filler()
774  * nal_hevc_read_filler() - Read filler data RBSP
777  * @n: maximum size of src that shall be read
779  * Read a filler data RBSP from @src up to a maximum size of @n bytes and
785  * The RBSP format of the filler data is specified in Rec. ITU-T H.265
790 ssize_t nal_hevc_read_filler(const struct device *dev, void *src, size_t n)  in nal_hevc_read_filler()  argument
799 		return -EINVAL;  in nal_hevc_read_filler()
801 	rbsp_init(&rbsp, src, n, &read);  in nal_hevc_read_filler()
814 		return -EINVAL;  in nal_hevc_read_filler()