Searched +full:mt8195 +full:- +full:scp_adsp (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek Functional Clock Controller for MT819510 - Chun-Jie Chen <chun-jie.chen@mediatek.com>14 PLLs -->15 dividers -->17 -->26 - enum:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>6 #include "clk-gate.h"7 #include "clk-mtk.h"9 #include <dt-bindings/clock/mt8195-clk.h>10 #include <linux/clk-provider.h>33 .compatible = "mediatek,mt8195-scp_adsp",45 .name = "clk-mt8195-scp_adsp",
1 # SPDX-License-Identifier: GPL-2.0-only360 to PCI-E and USB.390 to PCI-E and USB.845 tristate "Clock driver for MediaTek MT8192 scp_adsp"849 This driver supports MediaTek MT8192 scp_adsp clocks.866 bool "Clock driver for MediaTek MT8195"872 This driver supports MediaTek MT8195 clocks.875 tristate "Clock driver for MediaTek MT8195 apusys"879 This driver supports MediaTek MT8195 AI Processor Unit System clocks.882 tristate "Clock driver for MediaTek MT8195 audsys"[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o5 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o6 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o7 obj-$(CONFIG_COMMON_CLK_MT6765_CAMSYS) += clk-mt6765-cam.o8 obj-$(CONFIG_COMMON_CLK_MT6765_IMGSYS) += clk-mt6765-img.o9 obj-$(CONFIG_COMMON_CLK_MT6765_MIPI0ASYS) += clk-mt6765-mipi0a.o10 obj-$(CONFIG_COMMON_CLK_MT6765_MMSYS) += clk-mt6765-mm.o11 obj-$(CONFIG_COMMON_CLK_MT6765_VCODECSYS) += clk-mt6765-vcodec.o[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Mediatek mt8195 DSP core10 - YC Hung <yc.hung@mediatek.com>13 Some boards from mt8195 contain a DSP core used for14 advanced pre- and post- audio processing.18 const: mediatek,mt8195-dsp22 - description: Address and size of the DSP Cfg registers[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Mediatek AFE PCM controller for mt819510 - Trevor Wu <trevor.wu@mediatek.com>14 const: mediatek,mt8195-audio25 reset-names:28 memory-region:31 Shared memory region for AFE memif. A "shared-dma-pool".[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8195-clk.h>9 #include <dt-bindings/gce/mt8195-gce.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/memory/mt8195-memory-port.h>13 #include <dt-bindings/phy/phy.h>14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>15 #include <dt-bindings/power/mt8195-power.h>[all …]
