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/Linux-v5.4/drivers/staging/fwserial/
Ddma_fifo.c3 * DMA-able FIFO implementation
21 #define FAIL(fifo, condition, format...) ({ \ argument
22 fifo->corrupt = !!(condition); \
23 WARN(fifo->corrupt, format); \
35 * dma_fifo_init: initialize the fifo to a valid but inoperative state
36 * @fifo: address of in-place "struct dma_fifo" object
38 void dma_fifo_init(struct dma_fifo *fifo) in dma_fifo_init() argument
40 memset(fifo, 0, sizeof(*fifo)); in dma_fifo_init()
41 INIT_LIST_HEAD(&fifo->pending); in dma_fifo_init()
46 * @fifo: address of in-place "struct dma_fifo" object
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Ddma_fifo.h3 * DMA-able FIFO interface
12 * The design basis for the DMA FIFO is to provide an output side that
16 * for the lifetime of the FIFO).
20 * the FIFO will only advance the output in the original input sequence.
21 * This means the FIFO will eventually stall if a transaction is never retired.
23 * Chunking the output side into cache line multiples means that some FIFO
28 * This potential waste requires additional hidden capacity within the FIFO
32 * fragmentation when wrapping at the end of the FIFO. Input is allowed into the
33 * guard area, but the in and out FIFO markers are wrapped when DMA is pended.
45 int size; /* 'apparent' size of fifo */
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/Linux-v5.4/lib/
Dkfifo.c3 * A generic kernel FIFO implementation
17 * internal helper to calculate the unused elements in a fifo
19 static inline unsigned int kfifo_unused(struct __kfifo *fifo) in kfifo_unused() argument
21 return (fifo->mask + 1) - (fifo->in - fifo->out); in kfifo_unused()
24 int __kfifo_alloc(struct __kfifo *fifo, unsigned int size, in __kfifo_alloc() argument
33 fifo->in = 0; in __kfifo_alloc()
34 fifo->out = 0; in __kfifo_alloc()
35 fifo->esize = esize; in __kfifo_alloc()
38 fifo->data = NULL; in __kfifo_alloc()
39 fifo->mask = 0; in __kfifo_alloc()
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/Linux-v5.4/include/linux/
Dkfifo.h3 * A generic kernel FIFO implementation
12 * How to porting drivers to the new generic FIFO API:
31 * and one writer is using the fifo and no kfifo_reset() will be called.
98 * helper macro to distinguish between real in place fifo where the fifo
99 * array is a part of the structure and the fifo type where the array is
100 * outside of the fifo structure.
102 #define __is_kfifo_ptr(fifo) \ argument
103 (sizeof(*fifo) == sizeof(STRUCT_KFIFO_PTR(typeof(*(fifo)->type))))
106 * DECLARE_KFIFO_PTR - macro to declare a fifo pointer object
107 * @fifo: name of the declared fifo
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/Linux-v5.4/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dbase.c37 nvkm_fifo_recover_chan(struct nvkm_fifo *fifo, int chid) in nvkm_fifo_recover_chan() argument
40 if (WARN_ON(!fifo->func->recover_chan)) in nvkm_fifo_recover_chan()
42 spin_lock_irqsave(&fifo->lock, flags); in nvkm_fifo_recover_chan()
43 fifo->func->recover_chan(fifo, chid); in nvkm_fifo_recover_chan()
44 spin_unlock_irqrestore(&fifo->lock, flags); in nvkm_fifo_recover_chan()
48 nvkm_fifo_pause(struct nvkm_fifo *fifo, unsigned long *flags) in nvkm_fifo_pause() argument
50 return fifo->func->pause(fifo, flags); in nvkm_fifo_pause()
54 nvkm_fifo_start(struct nvkm_fifo *fifo, unsigned long *flags) in nvkm_fifo_start() argument
56 return fifo->func->start(fifo, flags); in nvkm_fifo_start()
60 nvkm_fifo_fault(struct nvkm_fifo *fifo, struct nvkm_fault_data *info) in nvkm_fifo_fault() argument
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DKbuild2 nvkm-y += nvkm/engine/fifo/base.o
3 nvkm-y += nvkm/engine/fifo/nv04.o
4 nvkm-y += nvkm/engine/fifo/nv10.o
5 nvkm-y += nvkm/engine/fifo/nv17.o
6 nvkm-y += nvkm/engine/fifo/nv40.o
7 nvkm-y += nvkm/engine/fifo/nv50.o
8 nvkm-y += nvkm/engine/fifo/g84.o
9 nvkm-y += nvkm/engine/fifo/gf100.o
10 nvkm-y += nvkm/engine/fifo/gk104.o
11 nvkm-y += nvkm/engine/fifo/gk110.o
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Dgk104.c52 gk104_fifo_engine_status(struct gk104_fifo *fifo, int engn, in gk104_fifo_engine_status() argument
55 struct nvkm_engine *engine = fifo->engine[engn].engine; in gk104_fifo_engine_status()
56 struct nvkm_subdev *subdev = &fifo->base.engine.subdev; in gk104_fifo_engine_status()
102 struct gk104_fifo *fifo = gk104_fifo(base); in gk104_fifo_class_new() local
103 if (oclass->engn == &fifo->func->chan) { in gk104_fifo_class_new()
105 return user->ctor(fifo, oclass, argv, argc, pobject); in gk104_fifo_class_new()
107 if (oclass->engn == &fifo->func->user) { in gk104_fifo_class_new()
119 struct gk104_fifo *fifo = gk104_fifo(base); in gk104_fifo_class_get() local
122 if (fifo->func->user.ctor && c++ == index) { in gk104_fifo_class_get()
123 oclass->base = fifo->func->user.user; in gk104_fifo_class_get()
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Dgf100.c37 gf100_fifo_uevent_init(struct nvkm_fifo *fifo) in gf100_fifo_uevent_init() argument
39 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_uevent_init()
44 gf100_fifo_uevent_fini(struct nvkm_fifo *fifo) in gf100_fifo_uevent_fini() argument
46 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_uevent_fini()
51 gf100_fifo_runlist_commit(struct gf100_fifo *fifo) in gf100_fifo_runlist_commit() argument
54 struct nvkm_subdev *subdev = &fifo->base.engine.subdev; in gf100_fifo_runlist_commit()
61 cur = fifo->runlist.mem[fifo->runlist.active]; in gf100_fifo_runlist_commit()
62 fifo->runlist.active = !fifo->runlist.active; in gf100_fifo_runlist_commit()
65 list_for_each_entry(chan, &fifo->chan, head) { in gf100_fifo_runlist_commit()
85 if (wait_event_timeout(fifo->runlist.wait, in gf100_fifo_runlist_commit()
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Dnv50.c30 nv50_fifo_runlist_update_locked(struct nv50_fifo *fifo) in nv50_fifo_runlist_update_locked() argument
32 struct nvkm_device *device = fifo->base.engine.subdev.device; in nv50_fifo_runlist_update_locked()
36 cur = fifo->runlist[fifo->cur_runlist]; in nv50_fifo_runlist_update_locked()
37 fifo->cur_runlist = !fifo->cur_runlist; in nv50_fifo_runlist_update_locked()
40 for (i = 0, p = 0; i < fifo->base.nr; i++) { in nv50_fifo_runlist_update_locked()
52 nv50_fifo_runlist_update(struct nv50_fifo *fifo) in nv50_fifo_runlist_update() argument
54 mutex_lock(&fifo->base.engine.subdev.mutex); in nv50_fifo_runlist_update()
55 nv50_fifo_runlist_update_locked(fifo); in nv50_fifo_runlist_update()
56 mutex_unlock(&fifo->base.engine.subdev.mutex); in nv50_fifo_runlist_update()
62 struct nv50_fifo *fifo = nv50_fifo(base); in nv50_fifo_oneinit() local
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Ddmanv04.c39 struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; in nv04_fifo_dma_object_dtor()
41 mutex_lock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_dtor()
43 mutex_unlock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_dtor()
51 struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; in nv04_fifo_dma_object_ctor()
66 mutex_lock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_ctor()
69 mutex_unlock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_ctor()
77 struct nv04_fifo *fifo = chan->fifo; in nv04_fifo_dma_fini() local
78 struct nvkm_device *device = fifo->base.engine.subdev.device; in nv04_fifo_dma_fini()
82 u32 mask = fifo->base.nr - 1; in nv04_fifo_dma_fini()
86 /* prevent fifo context switches */ in nv04_fifo_dma_fini()
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/Linux-v5.4/drivers/staging/axis-fifo/
Daxis-fifo.c3 * Xilinx AXIS FIFO: interface to the Xilinx AXI-Stream FIFO IP core
92 #define XLLF_INT_TFPF_MASK 0x00400000 /* Tx FIFO Programmable Full */
93 #define XLLF_INT_TFPE_MASK 0x00200000 /* Tx FIFO Programmable Empty */
94 #define XLLF_INT_RFPF_MASK 0x00100000 /* Rx FIFO Programmable Full */
95 #define XLLF_INT_RFPE_MASK 0x00080000 /* Rx FIFO Programmable Empty */
131 unsigned int rx_fifo_depth; /* max words in the receive fifo */
132 unsigned int tx_fifo_depth; /* max words in the transmit fifo */
133 int has_rx_fifo; /* whether the IP has the rx fifo enabled */
134 int has_tx_fifo; /* whether the IP has the tx fifo enabled */
157 struct axis_fifo *fifo = dev_get_drvdata(dev); in sysfs_write() local
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/Linux-v5.4/sound/soc/meson/
Daxg-fifo.c16 #include "axg-fifo.h"
20 * capture frontend DAI. The logic behind this two types of fifo is very
67 static void __dma_enable(struct axg_fifo *fifo, bool enable) in __dma_enable() argument
69 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN, in __dma_enable()
75 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_trigger() local
81 __dma_enable(fifo, true); in axg_fifo_pcm_trigger()
86 __dma_enable(fifo, false); in axg_fifo_pcm_trigger()
97 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_pointer() local
101 regmap_read(fifo->map, FIFO_STATUS2, &addr); in axg_fifo_pcm_pointer()
110 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_hw_params() local
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/Linux-v5.4/drivers/usb/renesas_usbhs/
Dfifo.c98 struct usbhs_fifo *fifo);
99 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
107 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); in usbhs_pkt_pop() local
121 if (fifo) in usbhs_pkt_pop()
122 chan = usbhsf_dma_chan_get(fifo, pkt); in usbhs_pkt_pop()
133 if (fifo) in usbhs_pkt_pop()
134 usbhsf_fifo_unselect(pipe, fifo); in usbhs_pkt_pop()
245 * FIFO ctrl
248 struct usbhs_fifo *fifo) in usbhsf_send_terminator() argument
252 usbhs_bset(priv, fifo->ctr, BVAL, BVAL); in usbhsf_send_terminator()
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/Linux-v5.4/drivers/platform/mellanox/
Dmlxbf-tmfifo.c38 /* Virtual devices sharing the TM FIFO. */
67 * @fifo: pointer to the tmfifo structure
83 struct mlxbf_tmfifo *fifo; member
113 * @tx_buf: tx buffer used to buffer data before writing into the FIFO
129 * @fifo: pointer to the tmfifo structure
134 struct mlxbf_tmfifo *fifo; member
143 * @rx_base: mapped register base address for the Rx FIFO
144 * @tx_base: mapped register base address for the Tx FIFO
145 * @rx_fifo_size: number of entries of the Rx FIFO
146 * @tx_fifo_size: number of entries of the Tx FIFO
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/Linux-v5.4/drivers/md/bcache/
Dutil.h122 #define fifo_for_each(c, fifo, iter) \ argument
123 for (iter = (fifo)->front; \
124 c = (fifo)->data[iter], iter != (fifo)->back; \
125 iter = (iter + 1) & (fifo)->mask)
127 #define __init_fifo(fifo, gfp) \ argument
130 BUG_ON(!(fifo)->size); \
132 _allocated_size = roundup_pow_of_two((fifo)->size + 1); \
133 _bytes = _allocated_size * sizeof(*(fifo)->data); \
135 (fifo)->mask = _allocated_size - 1; \
136 (fifo)->front = (fifo)->back = 0; \
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/Linux-v5.4/drivers/usb/gadget/udc/
Dfotg210.h47 /* Cx configuration and FIFO Empty Status register(0x120) */
49 #define DCFESR_FIFO_EMPTY(fifo) (1 << 8 << (fifo)) argument
76 #define DMISGR1_MF_IN_INT(fifo) (1 << (16 + (fifo))) argument
85 #define DMISGR1_MF_OUTSPK_INT(fifo) (0x3 << (fifo) * 2) argument
109 #define DISGR1_OUT_INT(fifo) (1 << ((fifo) * 2)) argument
110 #define DISGR1_SPK_INT(fifo) (1 << 1 << ((fifo) * 2)) argument
111 #define DISGR1_IN_INT(fifo) (1 << 16 << (fifo)) argument
163 /* Device FIFO Map Register (0x1A8) */
165 #define FIFOMAP_DIROUT(fifo) (0x0 << 4 << (fifo) * 8) argument
166 #define FIFOMAP_DIRIN(fifo) (0x1 << 4 << (fifo) * 8) argument
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/Linux-v5.4/sound/core/seq/
Dseq_fifo.h3 * ALSA sequencer FIFO
13 /* === FIFO === */
16 struct snd_seq_pool *pool; /* FIFO pool */
17 struct snd_seq_event_cell *head; /* pointer to head of fifo */
18 struct snd_seq_event_cell *tail; /* pointer to tail of fifo */
27 /* create new fifo (constructor) */
30 /* delete fifo (destructor) */
34 /* enqueue event to fifo */
37 /* lock fifo from release */
38 #define snd_seq_fifo_lock(fifo) snd_use_lock_use(&(fifo)->use_lock) argument
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/Linux-v5.4/drivers/net/ethernet/intel/fm10k/
Dfm10k_mbx.c7 * fm10k_fifo_init - Initialize a message FIFO
8 * @fifo: pointer to FIFO
9 * @buffer: pointer to memory to be used to store FIFO
10 * @size: maximum message size to store in FIFO, must be 2^n - 1
12 static void fm10k_fifo_init(struct fm10k_mbx_fifo *fifo, u32 *buffer, u16 size) in fm10k_fifo_init() argument
14 fifo->buffer = buffer; in fm10k_fifo_init()
15 fifo->size = size; in fm10k_fifo_init()
16 fifo->head = 0; in fm10k_fifo_init()
17 fifo->tail = 0; in fm10k_fifo_init()
21 * fm10k_fifo_used - Retrieve used space in FIFO
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/Linux-v5.4/drivers/net/ethernet/google/gve/
Dgve_tx.c25 * gve_tx_fifo_* manages the Registered Segment as a FIFO - clients must
29 static int gve_tx_fifo_init(struct gve_priv *priv, struct gve_tx_fifo *fifo) in gve_tx_fifo_init() argument
31 fifo->base = vmap(fifo->qpl->pages, fifo->qpl->num_entries, VM_MAP, in gve_tx_fifo_init()
33 if (unlikely(!fifo->base)) { in gve_tx_fifo_init()
34 netif_err(priv, drv, priv->dev, "Failed to vmap fifo, qpl_id = %d\n", in gve_tx_fifo_init()
35 fifo->qpl->id); in gve_tx_fifo_init()
39 fifo->size = fifo->qpl->num_entries * PAGE_SIZE; in gve_tx_fifo_init()
40 atomic_set(&fifo->available, fifo->size); in gve_tx_fifo_init()
41 fifo->head = 0; in gve_tx_fifo_init()
45 static void gve_tx_fifo_release(struct gve_priv *priv, struct gve_tx_fifo *fifo) in gve_tx_fifo_release() argument
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/Linux-v5.4/drivers/isdn/hardware/mISDN/
Dhfcsusb.c694 conhdlc = 8; /* enable FIFO */ in hfcsusb_setup_bch()
801 hfcsusb_rx_frame(struct usb_fifo *fifo, __u8 *data, unsigned int len, in hfcsusb_rx_frame() argument
804 struct hfcsusb *hw = fifo->hw; in hfcsusb_rx_frame()
807 int fifon = fifo->fifonum; in hfcsusb_rx_frame()
813 printk(KERN_DEBUG "%s: %s: fifo(%i) len(%i) " in hfcsusb_rx_frame()
816 fifo->dch, fifo->bch, fifo->ech); in hfcsusb_rx_frame()
821 if ((!!fifo->dch + !!fifo->bch + !!fifo->ech) != 1) { in hfcsusb_rx_frame()
828 if (fifo->dch) { in hfcsusb_rx_frame()
829 rx_skb = fifo->dch->rx_skb; in hfcsusb_rx_frame()
830 maxlen = fifo->dch->maxlen; in hfcsusb_rx_frame()
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/Linux-v5.4/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5121-psc.txt8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9 Controller node fsl,mpc5121-psc-fifo is required there:
19 PSC FIFO Controller and b is a field that represents an
23 - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4)
24 - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4)
30 for that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well.
35 fsl,mpc512x-psc-fifo node
39 - compatible : Should be "fsl,<soc>-psc-fifo"
42 FIFO Controller
44 PSC FIFO Controller and b is a field that represents an
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/Linux-v5.4/arch/arm/mach-pxa/include/mach/
Dregs-ac97.h12 #define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
13 #define POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
16 #define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
17 #define PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
20 #define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
21 #define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
40 #define POSR_FIFOE (1 << 4) /* FIFO error */
41 #define POSR_FSR (1 << 2) /* FIFO Service Request */
44 #define PISR_FIFOE (1 << 4) /* FIFO error */
46 #define PISR_FSR (1 << 2) /* FIFO Service Request */
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/Linux-v5.4/samples/kfifo/
Ddma-example.c3 * Sample fifo dma implementation
13 * This module shows how to handle fifo dma operations.
16 /* fifo size in elements (bytes) */
19 static struct kfifo fifo; variable
28 printk(KERN_INFO "DMA fifo test start\n"); in example_init()
30 if (kfifo_alloc(&fifo, FIFO_SIZE, GFP_KERNEL)) { in example_init()
35 printk(KERN_INFO "queue size: %u\n", kfifo_size(&fifo)); in example_init()
37 kfifo_in(&fifo, "test", 4); in example_init()
40 kfifo_put(&fifo, i); in example_init()
43 kfifo_skip(&fifo); in example_init()
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/Linux-v5.4/arch/unicore32/include/mach/
Dregs-spi.h40 * Transmit FIFO Not Full SPI_SR_TFNF
44 * Transmit FIFO Empty SPI_SR_TFE
48 * Receive FIFO Not Empty SPI_SR_RFNE
52 * Receive FIFO Full SPI_SR_RFF
57 * Trans. FIFO Empty Interrupt Status SPI_ISR_TXEIS
61 * Trans. FIFO Overflow Interrupt Status SPI_ISR_TXOIS
65 * Receiv. FIFO Underflow Interrupt Status SPI_ISR_RXUIS
69 * Receiv. FIFO Overflow Interrupt Status SPI_ISR_RXOIS
73 * Receiv. FIFO Full Interrupt Status SPI_ISR_RXFIS
79 * Trans. FIFO Empty Interrupt Mask SPI_IMR_TXEIM
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/Linux-v5.4/drivers/tty/serial/
Datmel_serial.h34 #define ATMEL_US_TXFCLR BIT(24) /* Transmit FIFO Clear */
35 #define ATMEL_US_RXFCLR BIT(25) /* Receive FIFO Clear */
36 #define ATMEL_US_TXFLCLR BIT(26) /* Transmit FIFO Lock Clear */
37 #define ATMEL_US_FIFOEN BIT(30) /* FIFO enable */
38 #define ATMEL_US_FIFODIS BIT(31) /* FIFO disable */
133 #define ATMEL_US_FMR 0xa0 /* FIFO Mode Register */
139 #define ATMEL_US_FRTSC BIT(7) /* FIFO RTS pin Control */
140 #define ATMEL_US_TXFTHRES(thr) (((thr) & 0x3f) << 8) /* TX FIFO Threshold */
141 #define ATMEL_US_RXFTHRES(thr) (((thr) & 0x3f) << 16) /* RX FIFO Threshold */
142 #define ATMEL_US_RXFTHRES2(thr) (((thr) & 0x3f) << 24) /* RX FIFO Threshold2 */
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