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/Linux-v5.15/Documentation/devicetree/bindings/power/
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
19 This device tree binding can be used to bind PM domain consumer devices with
20 their PM domains provided by PM domain providers. A PM domain provider can be
23 phandle arguments (so called PM domain specifiers) of length specified by the
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Ddomain-idle-state.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PM Domain Idle States binding description
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 A domain idle state node represents the state parameters that will be used to
14 select the state when there are no active components in the PM domain.
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
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/Linux-v5.15/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
46 const: arm,psci-0.2
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Dcoresight-cpu-debug.txt5 external debug module is mainly used for two modes: self-hosted debug and
8 debug module provides sample-based profiling extension, which can be used
14 - compatible : should be "arm,coresight-cpu-debug"; supplemented with
18 - reg : physical base address and length of the register set.
20 - clocks : the clock associated to this component.
22 - clock-names : the name of the clock referenced by the code. Since we are
29 - cpu : the CPU phandle the debug module is affined to. Do not assume it
34 - power-domains: a phandle to the debug power domain. We use "power-domains"
36 power domain and if necessary to use "cpuidle.off=1" or
38 constrain idle states to ensure registers in the CPU power
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Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
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/Linux-v5.15/drivers/cpuidle/
Dcpuidle-psci-domain.c1 // SPDX-License-Identifier: GPL-2.0
3 * PM domains for CPUs via genpd - managed by cpuidle-psci.
22 #include "cpuidle-psci.h"
34 struct genpd_power_state *state = &pd->states[pd->state_idx]; in psci_pd_power_off()
37 if (!state->data) in psci_pd_power_off()
41 return -EBUSY; in psci_pd_power_off()
43 /* OSI mode is enabled, set the corresponding domain state. */ in psci_pd_power_off()
44 pd_state = state->data; in psci_pd_power_off()
50 static int psci_pd_parse_state_nodes(struct genpd_power_state *states, in psci_pd_parse_state_nodes() argument
57 ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), in psci_pd_parse_state_nodes()
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Dcpuidle-psci.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PSCI CPU idle driver.
29 #include "cpuidle-psci.h"
61 u32 *states = data->psci_states; in __psci_enter_domain_idle_state() local
62 struct device *pd_dev = data->dev; in __psci_enter_domain_idle_state()
68 return -1; in __psci_enter_domain_idle_state()
80 state = states[idx]; in __psci_enter_domain_idle_state()
82 ret = psci_cpu_suspend_enter(state) ? -1 : idx; in __psci_enter_domain_idle_state()
93 /* Clear the domain state to start fresh when back from idle. */ in __psci_enter_domain_idle_state()
127 /* Clear domain state to start fresh at next online. */ in psci_idle_cpuhp_down()
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DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
3 # ARM CPU Idle drivers
6 bool "Generic ARM/ARM64 CPU idle Driver"
11 It provides a generic idle driver whose idle states are configured
12 at run-time through DT nodes. The CPUidle suspend backend is
13 initialized by calling the CPU operations init idle hook
17 bool "PSCI CPU idle Driver"
23 It provides an idle driver that is capable of detecting and
24 managing idle states through the PSCI firmware interface.
27 bool "PSCI CPU idle Domain"
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/Linux-v5.15/Documentation/trace/coresight/
Dcoresight-cpu-debug.rst9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
36 - At the time this documentation was written, the debug driver mainly relies on
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/Linux-v5.15/arch/arm/mach-omap2/
Dpm33xx-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
18 #include <linux/platform_data/gpio-omap.h>
34 #include "omap-secure.h"
53 return -ENOMEM; in am43xx_map_scu()
61 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am33xx_check_off_mode_enable()
70 * Check for am437x-gp-evm which has the right Hardware design to in am43xx_check_off_mode_enable()
73 if (of_machine_is_compatible("ti,am437x-gp-evm") && enable_off_mode) in am43xx_check_off_mode_enable()
76 pr_warn("WARNING: This platform does not support off-mode, entering DeepSleep suspend.\n"); in am43xx_check_off_mode_enable()
81 static int amx3_common_init(int (*idle)(u32 wfi_flags)) in amx3_common_init()
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/Linux-v5.15/drivers/base/power/
Ddomain_governor.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain_governor.c - Governors for device PM domains.
20 if (dev->power.subsys_data && dev->power.subsys_data->domain_data) { in dev_update_qos_constraint()
22 * Only take suspend-time QoS constraints of devices into in dev_update_qos_constraint()
28 constraint_ns = dev_gpd_data(dev)->td.effective_constraint_ns; in dev_update_qos_constraint()
31 * The child is not in a domain and there's no info on its in dev_update_qos_constraint()
47 * default_suspend_ok - Default PM domain governor routine to suspend devices.
52 struct gpd_timing_data *td = &dev_gpd_data(dev)->td; in default_suspend_ok()
58 spin_lock_irqsave(&dev->power.lock, flags); in default_suspend_ok()
60 if (!td->constraint_changed) { in default_suspend_ok()
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Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
35 __routine = genpd->dev_ops.callback; \
54 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
60 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
65 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
70 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
81 __acquires(&genpd->slock) in genpd_lock_spin()
85 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
86 genpd->lock_flags = flags; in genpd_lock_spin()
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/Linux-v5.15/Documentation/devicetree/bindings/arm/msm/
Dqcom,idle-state.txt1 QCOM Idle States for cpuidle driver
3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
18 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
34 between the time it enters idle and the next known wake up. SPC mode is used
37 sequence for this idle state is programmed to power down the supply to the
44 code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
49 modes. In a hierarchical power domain SoC, this means L2 and other caches can
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/Linux-v5.15/Documentation/trace/
Devents-power.rst8 - Power state switch which reports events related to suspend (S-states),
9 cpuidle (C-states) and cpufreq (P-states)
10 - System clock related changes
11 - Power domains related changes and transitions
22 -----------------
24 A 'cpu' event class gathers the CPU-related events: cpuidle and
39 Note: the value of '-1' or '4294967295' for state means an exit from the current state,
41 enters the idle state 4, while trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id())
42 means that the system exits the previous idle state.
46 correctly draw the states diagrams and to calculate accurate statistics etc.
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/Linux-v5.15/include/linux/
Dpm_domain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * pm_domain.h - Definitions and headers related to device power domains.
32 * ->power_on|off(), doesn't sleep. Hence, these
34 * enables genpd to power on/off the PM domain,
40 * GENPD_FLAG_ALWAYS_ON: Instructs genpd to always keep the PM domain
43 * GENPD_FLAG_ACTIVE_WAKEUP: Instructs genpd to keep the PM domain powered
51 * deploy idle power management support for CPUs
54 * last-man-standing algorithm, for the CPUs in the
55 * PM domain.
57 * GENPD_FLAG_RPM_ALWAYS_ON: Instructs genpd to always keep the PM domain
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Denergy_model.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct em_perf_state - Performance state of a performance domain
28 * struct em_perf_domain - Performance domain
29 * @table: List of performance states, in ascending order
30 * @nr_perf_states: Number of performance states
31 * @milliwatts: Flag indicating the power values are in milli-Watts
33 * @cpus: Cpumask covering the CPUs of the domain. It's here
38 * In case of CPU device, a "performance domain" represents a group of CPUs
39 * whose performance is scaled together. All CPUs of a performance domain
40 * must have the same micro-architecture. Performance domains often have
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/Linux-v5.15/arch/arm64/boot/dts/mediatek/
Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset-controller/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
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/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/Linux-v5.15/Documentation/driver-api/pm/
Ddevices.rst1 .. SPDX-License-Identifier: GPL-2.0
10 :Copyright: |copy| 2010-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
18 management (PM) code is also driver-specific. Most drivers will do very
22 This writeup gives an overview of how drivers interact with system-wide
25 background for the domain-specific work you'd do with any specific driver.
31 Drivers will use one or both of these models to put devices into low-power
32 states:
36 Drivers can enter low-power states as part of entering system-wide
37 low-power states like "suspend" (also known as "suspend-to-RAM"), or
39 "suspend-to-disk").
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/thermal/thermal.h>
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Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/interconnect/qcom,sc7280.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/power/qcom-aoss-qmp.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
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Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/qcom-aoss-qmp.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
14 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
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Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/soc/qcom,apr.h>
17 interrupt-parent = <&intc>;
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Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/gpio/gpio.h>
12 interrupt-parent = <&intc>;
14 qcom,msm-id = <292 0x0>;
16 #address-cells = <2>;
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/Linux-v5.15/Documentation/devicetree/bindings/thermal/
Dthermal-cooling-devices.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
20 - thermal-sensor: device that measures temperature, has SoC-specific bindings
21 - cooling-device: device used to dissipate heat either passively or actively
22 - thermal-zones: a container of the following node types used to describe all
28 - Passive cooling: by means of regulating device performance. A typical
30 scaling (DVFS), and uses lower frequencies as cooling states.
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