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/Linux-v5.4/arch/arm/boot/dts/
Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/mfd/dbx500-prcmu.h>
9 #include <dt-bindings/arm/ux500_pm_domains.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/thermal/thermal.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
21 #address-cells = <1>;
[all …]
Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
[all …]
Dstm32mp157c.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun8i-de2.h>
44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/reset/sun8i-de2.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/serial/
Dmrvl,pxa-ssp.txt5 - compatible: Must be one of
6 mrvl,pxa25x-ssp
7 mvrl,pxa25x-nssp
8 mrvl,pxa27x-ssp
9 mrvl,pxa3xx-ssp
10 mvrl,pxa168-ssp
11 mrvl,pxa910-ssp
12 mrvl,ce4100-ssp
14 - reg: The memory base
15 - dmas: Two dma phandles, one for rx, one for tx
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/dma/
Darm-pl330.txt1 * ARM PrimeCell PL330 DMA Controller
3 The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
7 - compatible: should include both "arm,pl330" and "arm,primecell".
8 - reg: physical base address of the controller and length of memory mapped
10 - interrupts: interrupt number to the cpu.
13 - dma-coherent : Present if dma operations are coherent
14 - #dma-cells: must be <1>. used to represent the number of integer
16 - dma-channels: contains the total number of DMA channels supported by the DMAC
17 - dma-requests: contains the total number of DMA requests supported by the DMAC
18 - arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
[all …]
Dfsl-edma.txt3 The eDMA channels have multiplex capability by programmble memory-mapped
5 specific DMA request source can only be multiplexed by any channel of certain
10 - compatible :
11 - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12 - "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
13 - reg : Specifies base physical address(s) and size of the eDMA registers.
17 - interrupts : A list of interrupt-specifiers, one for each entry in
18 interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel
20 error interrupt(located in the last), no interrupt-names list on
22 - #dma-cells : Must be <2>.
[all …]
Drenesas,rcar-dmac.txt1 * Renesas R-Car (RZ/G) DMA Controller Device Tree bindings
3 Renesas R-Car (Gen 2/3) and RZ/G SoCs have multiple multi-channel DMA
8 Each DMA client is connected to one dedicated port of the DMAC, identified by
9 an 8-bit port number called the MID/RID. A DMA controller can thus serve up to
11 number of clients to be served, channels must be shared between multiple DMA
12 clients. The association of DMA clients to DMAC channels is fully dynamic and
17 - compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.
19 - "renesas,dmac-r8a7743" (RZ/G1M)
20 - "renesas,dmac-r8a7744" (RZ/G1N)
21 - "renesas,dmac-r8a7745" (RZ/G1E)
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/sound/
Drockchip,pdm.txt5 - compatible: "rockchip,pdm"
6 - "rockchip,px30-pdm"
7 - "rockchip,rk1808-pdm"
8 - "rockchip,rk3308-pdm"
9 - reg: physical base address of the controller and length of memory mapped
11 - dmas: DMA specifiers for rx dma. See the DMA client binding,
12 Documentation/devicetree/bindings/dma/dma.txt
13 - dma-names: should include "rx".
14 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
15 - clock-names: should contain following:
[all …]
Dzte,zx-spdif.txt4 - compatible : Must be "zte,zx296702-spdif"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
7 - clock-names: "tx" for the clock to the SPDIF interface.
8 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
9 the core. The core expects one dma channel for transmit.
10 - dma-names : Must be "tx"
12 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
14 * resource-names.txt
15 * clock/clock-bindings.txt
[all …]
Ddesignware-i2s.txt4 - compatible : Must be "snps,designware-i2s"
5 - reg : Must contain the I2S core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's
9 - clock-names : "i2sclk" for the sample rate reference clock.
10 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
11 the core. The core expects one or two dma channels: one for transmit and
13 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
16 - interrupts: The interrupt line number for the I2S controller. Add this
17 parameter if the I2S controller that you are using does not support DMA.
19 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
[all …]
Dzte,zx-i2s.txt4 - compatible : Must be one of:
5 "zte,zx296718-i2s", "zte,zx296702-i2s"
6 "zte,zx296702-i2s"
7 - reg : Must contain I2S core's registers location and length
8 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
9 - clock-names: "wclk" for the wclk, "pclk" for the pclk to the I2S interface.
10 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
11 the core. The core expects two dma channels for transmit.
12 - dma-names : Must be "tx" and "rx"
14 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
[all …]
Dadi,axi-spdif-tx.txt1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
11 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
12 the core. The core expects one dma channel for transmit.
13 - dma-names : Must be "tx"
15 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
17 * resource-names.txt
[all …]
Dallwinner,sun4i-a10-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <maxime.ripard@bootlin.com>
14 "#sound-dai-cells":
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
21 - const: allwinner,sun8i-a83t-i2s
[all …]
Dsun4i-codec.txt4 - compatible: must be one of the following compatibles:
5 - "allwinner,sun4i-a10-codec"
6 - "allwinner,sun6i-a31-codec"
7 - "allwinner,sun7i-a20-codec"
8 - "allwinner,sun8i-a23-codec"
9 - "allwinner,sun8i-h3-codec"
10 - "allwinner,sun8i-v3s-codec"
11 - reg: must contain the registers location and length
12 - interrupts: must contain the codec interrupt
13 - dmas: DMA channels for tx and rx dma. See the DMA client binding,
[all …]
/Linux-v5.4/arch/arm64/boot/dts/renesas/
Dr8a77965.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
19 #address-cells = <2>;
20 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
[all …]
Dr8a7796.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
[all …]
Dr8a7795.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77950) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
[all …]
Dr8a774a1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <0>;
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/mfd/
Datmel-usart.txt4 - compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
7 For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
8 - reg: Should contain registers location and length
9 - interrupts: Should contain interrupt
10 - clock-names: tuple listing input clock names.
12 - clocks: phandles to input clocks.
15 - #size-cells : Must be <0>
16 - #address-cells : Must be <1>
17 - cs-gpios: chipselects (internal cs not supported)
18 - atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/crypto/
Domap-des.txt5 - compatible : Should contain "ti,omap4-des"
6 - ti,hwmods: Name of the hwmod associated with the DES module
7 - reg : Offset and length of the register set for the module
8 - interrupts : the interrupt-specifier for the DES module
9 - clocks : A phandle to the functional clock node of the DES module
10 corresponding to each entry in clock-names
11 - clock-names : Name of the functional clock, should be "fck"
14 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
15 Documentation/devicetree/bindings/dma/dma.txt
16 Each entry corresponds to an entry in dma-names
[all …]
Datmel-crypto.txt8 - compatible : Should be "atmel,at91sam9g46-aes".
9 - reg: Should contain AES registers location and length.
10 - interrupts: Should contain the IRQ line for the AES.
11 - dmas: List of two DMA specifiers as described in
12 atmel-dma.txt and dma.txt files.
13 - dma-names: Contains one identifier string for each DMA specifier
18 compatible = "atmel,at91sam9g46-aes";
23 dma-names = "tx", "rx";
28 - compatible : Should be "atmel,at91sam9g46-tdes".
29 - reg: Should contain TDES registers location and length.
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/usb/
Dda8xx-usb.txt3 For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
7 - compatible : Should be set to "ti,da830-musb".
9 - reg: Offset and length of the USB controller register set.
11 - interrupts: The USB interrupt number.
13 - interrupt-names: Should be set to "mc".
15 - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
17 - phys: Phandle for the PHY device
19 - phy-names: Should be "usb-phy"
21 - dmas: specifies the dma channels
23 - dma-names: specifies the names of the channels. Use "rxN" for receive
[all …]
Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
9 node and its PHY node are optional. The DMA node is also optional.
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
25 reg-names: phy
31 - compatible: ti,musb-am33xx
[all …]
/Linux-v5.4/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2015, Xilinx, Inc.
17 #address-cells = <2>;
18 #size-cells = <2>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,cortex-a53";
27 enable-method = "psci";
28 operating-points-v2 = <&cpu_opp_table>;
30 cpu-idle-states = <&CPU_SLEEP_0>;
[all …]

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