| /Linux-v5.10/Documentation/devicetree/bindings/usb/ |
| D | generic-ohci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 const: generic-ohci
34 In case the Renesas R-Car Gen3 SoCs:
35 - if a host only channel: first clock should be host.
36 - if a USB DRD channel: first clock should be host and second
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| D | generic-ehci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: "usb-hcd.yaml"
14 - if:
19 const: ibm,usb-ehci-440epx
28 const: generic-ehci
45 In case the Renesas R-Car Gen3 SoCs:
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| /Linux-v5.10/Documentation/devicetree/bindings/dma/ |
| D | fsl-qdma.txt | 8 - compatible: Must be one of
9 "fsl,ls1021a-qdma": for LS1021A Board
10 "fsl,ls1028a-qdma": for LS1028A Board
11 "fsl,ls1043a-qdma": for ls1043A Board
12 "fsl,ls1046a-qdma": for ls1046A Board
13 - reg: Should contain the register's base address and length.
14 - interrupts: Should contain a reference to the interrupt used by this
16 - interrupt-names: Should contain interrupt names:
17 "qdma-queue0": the block0 interrupt
18 "qdma-queue1": the block1 interrupt
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| /Linux-v5.10/drivers/usb/host/ |
| D | ohci.h | 1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
27 /* first fields are hardware-specified */
49 struct ed *ed_prev; /* for non-interrupt EDs */
53 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
54 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
76 ((int) (ohci->wdh_cnt - ed->takeback_wdh_cnt) >= 0)
89 /* first fields are hardware-specified */
124 * big-endian PPC hardware that's the second entry.
132 struct td *td_hash; /* dma-->td hashtable */
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| D | ehci-ppc-of.c | 1 // SPDX-License-Identifier: GPL-1.0+
5 * Bus Glue for PPC On-Chip EHCI driver on the of_platform bus
10 * Based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
85 return -EINVAL; in ppc44x_enable_bmt()
96 struct device_node *dn = op->dev.of_node; in ehci_hcd_ppc_of_probe()
106 return -ENODEV; in ehci_hcd_ppc_of_probe()
108 dev_dbg(&op->dev, "initializing PPC-OF USB Controller\n"); in ehci_hcd_ppc_of_probe()
114 hcd = usb_create_hcd(&ehci_ppc_of_hc_driver, &op->dev, "PPC-OF USB"); in ehci_hcd_ppc_of_probe()
116 return -ENOMEM; in ehci_hcd_ppc_of_probe()
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| D | ohci-platform.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the OCHI-SSB driver
10 * Derived from the OHCI-PCI driver
12 * Copyright 2000-2002 David Brownell
18 #include <linux/dma-mapping.h>
36 #define hcd_to_ohci_priv(h) ((struct ohci_platform_priv *)hcd_to_ohci(h)->priv)
43 static const char hcd_name[] = "ohci-platform";
51 for (clk = 0; clk < OHCI_MAX_CLKS && priv->clks[clk]; clk++) { in ohci_platform_power_on()
52 ret = clk_prepare_enable(priv->clks[clk]); in ohci_platform_power_on()
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| D | ehci-xilinx-of.c | 1 // SPDX-License-Identifier: GPL-2.0+
9 * Based on "ehci-ppc-of.c" by Valentine Barshak <vbarshak@ru.mvista.com>
10 * and "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
23 * ehci_xilinx_port_handed_over - hand the port out if failed to enable it
38 dev_warn(hcd->self.controller, "port %d cannot be enabled\n", portnum); in ehci_xilinx_port_handed_over()
39 if (hcd->has_tt) { in ehci_xilinx_port_handed_over()
40 dev_warn(hcd->self.controller, in ehci_xilinx_port_handed_over()
43 dev_warn(hcd->self.controller, in ehci_xilinx_port_handed_over()
46 dev_warn(hcd->self.controller, in ehci_xilinx_port_handed_over()
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| D | uhci-hcd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
61 #define USBPORTSC_DMINUS 0x0020 /* D- high (line status) */
80 /* PCI Intel-specific resume-enable register */
97 /* When no queues need Full-Speed Bandwidth Reclamation,
110 * To facilitate the strongest possible byte-order checking from "sparse"
127 * with each endpoint, and qh->element (updated by the HC) is either:
128 * - the next unprocessed TD in the endpoint's queue, or
129 * - UHCI_PTR_TERM (when there's no more traffic for this endpoint).
133 * place. Then qh->element is UHCI_PTR_TERM.
135 * In the schedule, qh->link maintains a list of QHs seen by the HC:
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| D | ehci-platform.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the ohci-ssb driver
12 * Derived from the EHCI-PCI driver
13 * Copyright (c) 2000-2004 by David Brownell
15 * Derived from the ohci-pci driver
17 * Copyright 2000-2002 David Brownell
23 #include <linux/dma-mapping.h>
43 #define hcd_to_ehci_priv(h) ((struct ehci_platform_priv *)hcd_to_ehci(h)->priv)
57 static const char hcd_name[] = "ehci-platform";
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| D | uhci-grlib.c | 1 // SPDX-License-Identifier: GPL-2.0
9 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
16 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
17 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
18 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
34 * with bit 7 (0x80) turned on then the current little-endian in uhci_grlib_init()
36 * byte-swapped; hence the register interface and presumably in uhci_grlib_init()
37 * also the descriptors are big-endian. in uhci_grlib_init()
40 uhci->big_endian_mmio = 1; in uhci_grlib_init()
41 uhci->big_endian_desc = 1; in uhci_grlib_init()
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | ls1021a.dtsi | 2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
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| /Linux-v5.10/drivers/dma/ |
| D | fsl-edma-common.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Freescale Semiconductor, Inc
9 #include <linux/dma-mapping.h>
11 #include "fsl-edma-common.h"
47 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_enable_request() local
48 u32 ch = fsl_chan->vchan.chan.chan_id; in fsl_edma_enable_request()
50 if (fsl_chan->edma->drvdata->version == v1) { in fsl_edma_enable_request()
51 edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); in fsl_edma_enable_request()
52 edma_writeb(fsl_chan->edma, ch, regs->serq); in fsl_edma_enable_request()
54 /* ColdFire is big endian, and accesses natively in fsl_edma_enable_request()
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| D | fsl-edma-common.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
9 #include <linux/dma-direction.h>
11 #include "virt-dma.h"
167 struct edma_regs regs; member
172 * R/W functions for big- or little-endian registers:
173 * The eDMA controller's endian is independent of the CPU core's endian.
174 * For the big-endian IP module, the offset for 8-bit or 16-bit registers
175 * should also be swapped opposite to that in little-endian IP.
179 if (edma->big_endian) in edma_readl()
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| /Linux-v5.10/Documentation/devicetree/bindings/mips/cavium/ |
| D | uctl.txt | 4 - compatible: "cavium,octeon-6335-uctl"
8 - reg: The base address of the UCTL register bank.
10 - #address-cells: Must be <2>.
12 - #size-cells: Must be <2>.
14 - ranges: Empty to signify direct mapping of the children.
16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
24 compatible = "cavium,octeon-6335-uctl";
27 #address-cells = <2>;
28 #size-cells = <2>;
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| /Linux-v5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
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| D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
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| D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
22 rtic-a = &rtic_a;
23 rtic-b = &rtic_b;
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| /Linux-v5.10/drivers/phy/broadcom/ |
| D | phy-brcm-usb-init.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014-2017 Broadcom
52 void __iomem *regs[BRCM_REGS_MAX]; member
75 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcm_usb_readl()
76 * endian I/O). in brcm_usb_readl()
78 * Other architectures (e.g., ARM) either do not support big endian, or in brcm_usb_readl()
79 * else leave I/O in little endian mode. in brcm_usb_readl()
108 if (ini->ops->init_ipp) in brcm_usb_init_ipp()
109 ini->ops->init_ipp(ini); in brcm_usb_init_ipp()
114 if (ini->ops->init_common) in brcm_usb_init_common()
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| /Linux-v5.10/arch/mips/include/asm/sgi/ |
| D | hpc3.h | 36 /* The set of regs for each HPC3 PBUS DMA channel. */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
48 #define HPC3_PDMACTRL_SEL 0x00000002 /* little endian transfer */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
73 #define HPC3_SCTRL_ENDIAN 0x02 /* DMA endian mode, 0=big 1=little */
89 #define HPC3_SDCFG_HW 0x01000 /* Enable 16-bit halfword DMA accesses to scsi */
100 #define HPC3_SPCFG_HW 0x1000 /* Enable 16-bit halfword PIO accesses to scsi */
105 u32 _unused1[0x1000/4 - 6]; /* padding */
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| /Linux-v5.10/drivers/gpio/ |
| D | gpio-mpc8xxx.c | 40 void __iomem *regs; member
51 * This hardware has a big endian bit assignment such that GPIO line 0 is
57 return BIT(31 - offset); in mpc_pin2mask()
71 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR); in mpc8572_gpio_get()
72 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask; in mpc8572_gpio_get()
73 out_shadow = gc->bgpio_data & out_mask; in mpc8572_gpio_get()
84 return -EINVAL; in mpc5121_gpio_dir_out()
86 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5121_gpio_dir_out()
95 return -EINVAL; in mpc5125_gpio_dir_out()
97 return mpc8xxx_gc->direction_output(gc, gpio, val); in mpc5125_gpio_dir_out()
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| /Linux-v5.10/arch/arm64/include/asm/ |
| D | syscall.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 typedef long (*syscall_fn_t)(const struct pt_regs *regs);
21 struct pt_regs *regs) in syscall_get_nr() argument
23 return regs->syscallno; in syscall_get_nr()
27 struct pt_regs *regs) in syscall_rollback() argument
29 regs->regs[0] = regs->orig_x0; in syscall_rollback()
34 struct pt_regs *regs) in syscall_get_error() argument
36 unsigned long error = regs->regs[0]; in syscall_get_error()
45 struct pt_regs *regs) in syscall_get_return_value() argument
47 return regs->regs[0]; in syscall_get_return_value()
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| /Linux-v5.10/arch/powerpc/include/asm/ |
| D | compat.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <asm-generic/compat.h>
99 struct pt_regs *regs = current->thread.regs; in arch_compat_alloc_user_space() local
100 unsigned long usp = regs->gpr[1]; in arch_compat_alloc_user_space()
104 * can access 288 bytes in the 64bit big-endian ABI, in arch_compat_alloc_user_space()
105 * or 512 bytes with the new ELFv2 little-endian ABI. in arch_compat_alloc_user_space()
108 usp -= USER_REDZONE_SIZE; in arch_compat_alloc_user_space()
110 return (void __user *) (usp - len); in arch_compat_alloc_user_space()
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| D | ptrace.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * this should only contain volatile regs
9 * since we can keep non-volatile in the thread_struct
23 #include <asm/asm-const.h>
69 * pointer. This is 288 in the 64-bit big-endian ELF ABI, and 512 in
70 * the new ELFv2 little-endian ABI, so we allow the larger amount.
72 * For kernel code we allow a 288-byte redzone, in order to conserve
114 static inline unsigned long instruction_pointer(struct pt_regs *regs) in instruction_pointer() argument
116 return regs->nip; in instruction_pointer()
119 static inline void instruction_pointer_set(struct pt_regs *regs, in instruction_pointer_set() argument
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| /Linux-v5.10/include/video/ |
| D | sstfb.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/drivers/video/sstfb.h -- voodoo graphics frame buffer
105 # define LFB_WORD_SWIZZLE_WR BIT(11) /* enable write-wordswap (big-endian) */
106 # define LFB_BYTE_SWIZZLE_WR BIT(12) /* enable write-byteswap (big-endian) */
108 # define LFB_WORD_SWIZZLE_RD BIT(15) /* enable read-wordswap (big-endian) */
109 # define LFB_BYTE_SWIZZLE_RD BIT(16) /* enable read-byteswap (big-endian) */
192 # define BLT_SCR2SCR_BITBLT 0 /* Screen-to-Screen BitBLT */
193 # define BLT_CPU2SCR_BITBLT 1 /* CPU-to-screen BitBLT */
195 # define BLT_16BPP_FMT 2 /* 16 BPP (5-6-5 RGB) */
196 #define BLTDATA 0x02fc /* BitBLT data for CPU-to-Screen BitBLTs */
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| /Linux-v5.10/include/net/netfilter/ |
| D | nf_tables_core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
47 /* Calculate the mask for the nft_cmp_fast expression. On big endian the
54 data) * BITS_PER_BYTE - len)); in nft_cmp_fast_mask()
95 struct nft_regs *regs, const struct nft_pktinfo *pkt);
97 struct nft_regs *regs, const struct nft_pktinfo *pkt);
99 struct nft_regs *regs, const struct nft_pktinfo *pkt);
101 struct nft_regs *regs, const struct nft_pktinfo *pkt);
103 struct nft_regs *regs, const struct nft_pktinfo *pkt);
105 struct nft_regs *regs, const struct nft_pktinfo *pkt);
107 struct nft_regs *regs, const struct nft_pktinfo *pkt);
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