Searched +full:bias +full:- +full:bus +full:- +full:hold (Results  1 – 25 of 38) sorted by relevance
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| /Linux-v5.15/drivers/acpi/acpica/ | 
| D | utresdecode.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 4  * Module Name: utresdecode - Resource descriptor keyword strings 28 	"0 - Good Configuration", 29 	"1 - Acceptable Configuration", 30 	"2 - Suboptimal Configuration", 31 	"3 - ***Invalid Configuration***", 165 /* Serial bus type */ 168 	"/* UNKNOWN serial bus type */", 175 /* I2C serial bus access mode */ 182 /* I2C serial bus slave mode */ [all …] 
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| /Linux-v5.15/Documentation/devicetree/bindings/mfd/ | 
| D | cirrus,madera.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cirrus Logic Madera class audio CODECs Multi-Functional Device 10   - patches@opensource.cirrus.com 23   - $ref: /schemas/pinctrl/cirrus,madera.yaml# 24   - $ref: /schemas/regulator/wlf,arizona.yaml# 25   - $ref: /schemas/sound/cirrus,madera.yaml# 26   - if: 31               - cirrus,cs47l85 [all …] 
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| /Linux-v5.15/drivers/pinctrl/ | 
| D | pinconf-generic.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5  * Copyright (C) 2011 ST-Ericsson SA 6  * Written on behalf of Linaro for ST-Ericsson 22 #include <linux/pinctrl/pinconf-generic.h> 26 #include "pinctrl-utils.h" 30 	PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false), 31 	PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false), 32 	PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false), 33 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL, false), 35 				"input bias pull to pin specific state", NULL, false), [all …] 
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| /Linux-v5.15/arch/arm/boot/dts/ | 
| D | at91-sama5d2_xplained.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3  * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board 8 /dts-v1/; 10 #include "sama5d2-pinfunc.h" 11 #include <dt-bindings/mfd/atmel-flexcom.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h> 18 	compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; 28 		stdout-path = "serial0:115200n8"; [all …] 
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| D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3  * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 6 #include "stm32mp15-pinctrl.dtsi" 7 #include "stm32mp15xxaa-pinctrl.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/mfd/st,stpmic1.h> 24 	reserved-memory { 25 		#address-cells = <1>; 26 		#size-cells = <1>; 30 			compatible = "shared-dma-pool"; [all …] 
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| D | qcom-apq8060-dragonboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 6 #include "qcom-msm8660.dtsi" 10 	compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 17 		stdout-path = "serial0:115200n8"; 21 		compatible = "simple-bus"; 24 		vph: regulator-fixed { [all …] 
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| D | qcom-ipq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mfd/qcom-rpm.h> 6 #include <dt-bindings/clock/qcom,rpmcc.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h> 11 #include <dt-bindings/soc/qcom,gsbi.h> [all …] 
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| D | rk3288-firefly-reload-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 16 	ext_gmac: external-gmac-clock { 17 		compatible = "fixed-clock"; 18 		#clock-cells = <0>; 19 		clock-frequency = <125000000>; 20 		clock-output-names = "ext_gmac"; 24 	vcc_flash: flash-regulator { 25 		compatible = "regulator-fixed"; 26 		regulator-name = "vcc_flash"; [all …] 
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| D | rk3288-firefly.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/input/input.h> 15 	adc-keys { 16 		compatible = "adc-keys"; 17 		io-channels = <&saradc 1>; 18 		io-channel-names = "buttons"; 19 		keyup-threshold-microvolt = <1800000>; 21 		button-recovery { 24 			press-threshold-microvolt = <0>; 28 	dovdd_1v8: dovdd-1v8-regulator { [all …] 
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| D | imx6qdl-gw54xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/sound/fsl-imx-audmux.h> 28 		compatible = "pwm-backlight"; 30 		brightness-levels = <0 4 8 16 32 64 128 255>; 31 		default-brightness-level = <7>; 34 	gpio-keys { 35 		compatible = "gpio-keys"; [all …] 
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| D | imx6qdl-gw52xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 27 		compatible = "pwm-backlight"; 29 		brightness-levels = <0 4 8 16 32 64 128 255>; 30 		default-brightness-level = <7>; 33 	gpio-keys { 34 		compatible = "gpio-keys"; 36 		user-pb { [all …] 
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| D | imx6qdl-gw53xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 27 		compatible = "pwm-backlight"; 29 		brightness-levels = <0 4 8 16 32 64 128 255>; 30 		default-brightness-level = <7>; 33 	gpio-keys { 34 		compatible = "gpio-keys"; 36 		user-pb { [all …] 
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| D | imx6qdl-gw560x.dtsi | 4  * This file is dual-licensed: you can use it either under the terms 22  *     MA 02110-1301 USA 48 #include <dt-bindings/gpio/gpio.h> 49 #include <dt-bindings/input/input.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 64 		stdout-path = &uart2; 67 	backlight-display { 68 		compatible = "pwm-backlight"; 70 		brightness-levels = < 83 		default-brightness-level = <100>; [all …] 
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| /Linux-v5.15/Documentation/devicetree/bindings/pinctrl/ | 
| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Linus Walleij <linus.walleij@linaro.org> 21   bias-disable: 23     description: disable any pin bias 25   bias-high-impedance: 27     description: high impedance mode ("third-state", "floating") 29   bias-bus-hold: [all …] 
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| D | intel,pinctrl-keembay.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> 19     const: intel,keembay-pinctrl 24   gpio-controller: true 26   '#gpio-cells': 39   interrupt-controller: true 41   '#interrupt-cells': [all …] 
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| D | cirrus,madera.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10   - patches@opensource.cirrus.com 30     Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 33   pinctrl-0: 38   pinctrl-names: 43   pin-settings: 50       '-pins$': 53           - $ref: "pincfg-node.yaml#" [all …] 
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| D | img,pistachio-pinctrl.txt | 8 each. The GPIO banks are represented as sub-nodes of the pad controller node. 10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11 ../interrupt-controller/interrupts.txt for generic information regarding 15 -------------------------------------------- 16  - compatible: "img,pistachio-system-pinctrl". 17  - reg: Address range of the pinctrl registers. 19 Required properties for GPIO bank sub-nodes: 20 -------------------------------------------- 21  - interrupts: Interrupt line for the GPIO bank. 22  - gpio-controller: Indicates the device is a GPIO controller. [all …] 
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| D | actions,s900-pinctrl.txt | 7 - compatible:   Should be "actions,s900-pinctrl" 8 - reg:          Should contain the register base address and size of 10 - clocks:       phandle of the clock feeding the pin controller 11 - gpio-controller: Marks the device node as a GPIO controller. 12 - gpio-ranges: Specifies the mapping between gpio controller and 13                pin-controller pins. 14 - #gpio-cells: Should be two. The first cell is the gpio pin number 16 - interrupt-controller: Marks the device node as an interrupt controller. 17 - #interrupt-cells: Specifies the number of cells needed to encode an 21                     bindings/interrupt-controller/interrupts.txt [all …] 
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| /Linux-v5.15/include/linux/platform_data/ | 
| D | video-pxafb.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5  *  Author:     Jean-Frederic Clere 11 #include <mach/regs-lcd.h> 16  * bits 0 - 3: for LCD panel type: 18  *   STN  - for passive matrix 19  *   DSTN - for dual scan passive matrix 20  *   TFT  - for active matrix 22  * bits 4 - 9 : for bus width 23  * bits 10-17 : for AC Bias Pin Frequency 62  * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine [all …] 
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| /Linux-v5.15/arch/arm64/boot/dts/qcom/ | 
| D | sc7280.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 8 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,rpmh.h> 10 #include <dt-bindings/interconnect/qcom,sc7280.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/mailbox/qcom-ipcc.h> 13 #include <dt-bindings/power/qcom-aoss-qmp.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/reset/qcom,sdm845-aoss.h> [all …] 
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| D | sm8250.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-bindings/clock/qcom,gcc-sm8250.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,osm-l3.h> 14 #include <dt-bindings/interconnect/qcom,sm8250.h> [all …] 
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| /Linux-v5.15/arch/mips/boot/dts/ingenic/ | 
| D | gcw0.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/clock/ingenic,tcu.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/iio/adc/ingenic,adc.h> 9 #include <dt-bindings/input/input.h> 29 		stdout-path = "serial2:57600n8"; 33 		compatible = "regulator-fixed"; 34 		regulator-name = "vcc"; 36 		regulator-min-microvolt = <3300000>; [all …] 
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| /Linux-v5.15/arch/arm/mach-sa1100/include/mach/ | 
| D | SA-1100.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3  *	FILE    	SA-1100.h 9  *	System  	StrongARM SA-1100 12  *	        	SA-1100 microprocessor (Advanced RISC Machine (ARM) 14  *	        	StrongARM SA-1100 data sheet version 2.2. 21 #error You must include hardware.h not SA-1100.h 77  * Universal Serial Bus (USB) Device Controller (UDC) control registers 80  *    Ser0UDCCR 	Serial port 0 Universal Serial Bus (USB) Device 82  *    Ser0UDCAR 	Serial port 0 Universal Serial Bus (USB) Device 84  *    Ser0UDCOMP	Serial port 0 Universal Serial Bus (USB) Device [all …] 
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| /Linux-v5.15/sound/soc/codecs/ | 
| D | cs42l42.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3  * cs42l42.c -- CS42L42 ALSA SoC audio driver 33 #include <sound/soc-dapm.h> 36 #include <dt-bindings/sound/cs42l42.h> 408 static DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 100, true); 409 static DECLARE_TLV_DB_SCALE(mixer_tlv, -6300, 100, true); 438 	SOC_SINGLE_S8_TLV("ADC Volume", CS42L42_ADC_VOLUME, -97, 12, adc_tlv), 518 	cs42l42->jack = jk;  in cs42l42_set_jack() 520 	regmap_update_bits(cs42l42->regmap, CS42L42_TSRS_PLUG_INT_MASK,  in cs42l42_set_jack() 533 	cs42l42->component = component;  in cs42l42_component_probe() [all …] 
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| /Linux-v5.15/Documentation/driver-api/ | 
| D | pin-control.rst | 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14   biasing and driving mode specific pins, such as pull-up/down, open drain, 17 Top-level interface 22 - A pin controller is a piece of hardware, usually a set of registers, that 23   can control PINs. It may be able to multiplex, bias, set load capacitance, 28 - PINS are equal to pads, fingers, balls or whatever packaging input or 32   be sparse - i.e. there may be gaps in the space with numbers where no 98 See for example arch/arm/mach-ux500/Kconfig for an example. [all …] 
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