Home
last modified time | relevance | path

Searched +full:1 +full:kib (Results 1 – 25 of 266) sorted by relevance

1234567891011

/Linux-v5.15/Documentation/filesystems/ext4/
Dblocks.rst7 sectors between 1KiB and 64KiB, and the number of sectors must be an
10 4KiB. You may experience mounting problems if block size is greater than
11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory
20 :widths: 1 1 1 1 1
21 :header-rows: 1
24 - 1KiB
25 - 2KiB
26 - 4KiB
27 - 64KiB
66 - 1,074,791,436
[all …]
/Linux-v5.15/arch/x86/platform/intel-quark/
Dimr_selftest.c56 * zero sized allocations and 1 KiB sized areas.
84 /* Test that a 1 KiB IMR @ zero with read/write all will bomb out. */ in imr_self_test()
87 imr_self_test_result(ret < 0, "1KiB IMR @ 0x00000000 - access-all\n"); in imr_self_test()
89 /* Test that a 1 KiB IMR @ zero with CPU only will work. */ in imr_self_test()
91 imr_self_test_result(ret >= 0, "1KiB IMR @ 0x00000000 - cpu-access\n"); in imr_self_test()
97 /* Test 2 KiB works. */ in imr_self_test()
100 imr_self_test_result(ret >= 0, "2KiB IMR @ 0x00000000\n"); in imr_self_test()
103 imr_self_test_result(ret == 0, "teardown 2KiB\n"); in imr_self_test()
Dimr.c56 * 23:2 1 KiB aligned lo address
57 * 1:0 Reserved
61 * 23:2 1 KiB aligned hi address
62 * 1:0 Reserved
213 size = end - base + 1; in imr_dbgfs_state_show()
252 pr_err("base %pa size 0x%08zx must align to 1KiB\n", in imr_check_params()
292 * @base: physical base address of region aligned to 1KiB.
293 * @size: physical size of region in bytes must be aligned to 1KiB.
339 reg = -1; in imr_add_range()
358 if (reg == -1) { in imr_add_range()
[all …]
/Linux-v5.15/Documentation/arm/
Dtcm.rst8 This is usually just a few (4-64) KiB of RAM inside the ARM
15 The size of DTCM or ITCM is minimum 4KiB so the typical
16 minimum configuration is 4KiB ITCM and 4KiB DTCM.
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
39 implementation will map the TCM 1 to 1 from physical to virtual
42 on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM.
45 TCMs in two separate banks, so for example an 8KiB ITCM is divided
46 into two 4KiB banks with its own control registers. The idea is to
153 tcmem[1] = 0x2BADBABEU;
/Linux-v5.15/Documentation/admin-guide/device-mapper/
Ddm-ebs.rst30 1, 2, 4, 8 sectors of 512 bytes supported.
36 2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB.
42 Emulate 1 sector = 512 bytes logical block size on /dev/sda starting at
45 ebs /dev/sda 1024 1
47 Emulate 2 sector = 1KiB logical block size on /dev/sda starting at
48 offset 128 sectors, enforce 2KiB underlying device block size.
49 This presumes 2KiB logical blocksize on /dev/sda or less to work:
/Linux-v5.15/tools/perf/arch/x86/util/
Dintel-bts.c28 #define KiB(x) ((x) * 1024) macro
30 #define KiB_MASK(x) (KiB(x) - 1)
31 #define MiB_MASK(x) (MiB(x) - 1)
114 bool privileged = perf_event_paranoid_check(-1); in intel_bts_recording_options()
131 evsel->core.attr.sample_period = 1; in intel_bts_recording_options()
156 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options()
158 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options()
162 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options()
193 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options()
195 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options()
[all …]
Dintel-pt.c35 #define KiB(x) ((x) * 1024) macro
37 #define KiB_MASK(x) (KiB(x) - 1)
38 #define MiB_MASK(x) (MiB(x) - 1)
103 const u64 top_bit = 1ULL << 63; in intel_pt_masked_bits()
109 res <<= 1; in intel_pt_masked_bits()
111 res |= 1; in intel_pt_masked_bits()
113 mask <<= 1; in intel_pt_masked_bits()
114 bits <<= 1; in intel_pt_masked_bits()
150 "%d", &topa_multiple_entries) != 1) in intel_pt_psb_period()
166 psb_period = 1 << (val + 11); in intel_pt_psb_period()
[all …]
/Linux-v5.15/drivers/mtd/tests/
Dspeedtest.c201 if (mtd->writesize == 1) { in mtd_speedtest_init()
244 /* Write all eraseblocks, 1 eraseblock at a time */ in mtd_speedtest_init()
260 pr_info("eraseblock write speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
262 /* Read all eraseblocks, 1 eraseblock at a time */ in mtd_speedtest_init()
278 pr_info("eraseblock read speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
284 /* Write all eraseblocks, 1 page at a time */ in mtd_speedtest_init()
300 pr_info("page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
302 /* Read all eraseblocks, 1 page at a time */ in mtd_speedtest_init()
318 pr_info("page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
340 pr_info("2 page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Darmada-385-linksys-rango.dts25 wan_white@1 {
86 #address-cells = <1>;
87 #size-cells = <1>;
97 reg = <0x200000 0x20000>; /* 128KiB */
102 reg = <0x220000 0x40000>; /* 256KiB */
107 reg = <0x7e0000 0x40000>; /* 256KiB */
113 reg = <0x820000 0x1e0000>; /* 1920KiB */
163 no-1-8-v;
Domap3-overo-base.dtsi20 led-1 {
22 pwms = <&twl_pwmled 1 7812500>;
229 <1 IRQ_TYPE_NONE>; /* termcount */
249 #address-cells = <1>;
250 #size-cells = <1>;
254 reg = <0 0x80000>; /* 512KiB */
258 reg = <0x80000 0x1C0000>; /* 1792KiB */
260 partition@1c0000 {
262 reg = <0x240000 0x40000>; /* 256KiB */
266 reg = <0x280000 0x800000>; /* 8192KiB */
Darmada-385-linksys-caiman.dts23 wan_white@1 {
78 #address-cells = <1>;
79 #size-cells = <1>;
89 reg = <0x200000 0x40000>; /* 256KiB */
94 reg = <0x240000 0x40000>; /* 256KiB */
99 reg = <0x900000 0x100000>; /* 1MiB */
Darmada-385-linksys-cobra.dts23 wan_white@1 {
78 #address-cells = <1>;
79 #size-cells = <1>;
89 reg = <0x200000 0x40000>; /* 256KiB */
94 reg = <0x240000 0x40000>; /* 256KiB */
99 reg = <0x900000 0x100000>; /* 1MiB */
Darmada-385-linksys-shelby.dts23 wan_white@1 {
78 #address-cells = <1>;
79 #size-cells = <1>;
89 reg = <0x200000 0x40000>; /* 256KiB */
94 reg = <0x240000 0x40000>; /* 256KiB */
99 reg = <0x900000 0x100000>; /* 1MiB */
/Linux-v5.15/drivers/mtd/nand/onenand/
DKconfig16 from 1 to 0. There is a rare possibility that even though the
47 Also, 1st Block of NAND Flash Array can be used as OTP.
61 of 4KiB. Plane1 has only even blocks such as block0, block2, block4
63 So MTD regards it as 4KiB page size and 256KiB block size
/Linux-v5.15/arch/arm/mach-cns3xxx/
Dcore.c56 .length = SZ_64K, /* really 4 KiB at offset 32 KiB */
71 .length = SZ_64K, /* really 4 KiB at offset 32 KiB */
124 ctrl |= (1 << 2) | (1 << 9); in cns3xxx_set_oneshot()
137 ctrl |= (1 << 0) | (1 << 2) | (1 << 9); in cns3xxx_set_periodic()
148 writel(ctrl | (1 << 0), cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); in cns3xxx_timer_set_next_event()
185 writel(val & ~(1 << 2), stat); in cns3xxx_timer_interrupt()
218 irq_mask &= ~(1 << 2); in __cns3xxx_timer_init()
224 val |= (1 << 9); in __cns3xxx_timer_init()
233 irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5)); in __cns3xxx_timer_init()
238 val |= (1 << 10); in __cns3xxx_timer_init()
[all …]
/Linux-v5.15/fs/jffs2/
Dbuild.c85 if (child_ic->pino_nlink > 1) in jffs2_build_inode_pass1()
86 *dir_hardlinks = 1; in jffs2_build_inode_pass1()
120 dbg_fsbuild("pass 1 starting\n"); in jffs2_build_filesystem()
130 dbg_fsbuild("pass 1 complete\n"); in jffs2_build_filesystem()
199 * value (which is 1). */ in jffs2_build_filesystem()
273 whinged = 1; in jffs2_build_remove_unlinked_inode()
324 size += c->sector_size - 1; /* ... and round up */ in jffs2_calc_trigger_levels()
330 c->resv_blocks_gctrigger = c->resv_blocks_write + 1; in jffs2_calc_trigger_levels()
334 c->resv_blocks_gcmerge = c->resv_blocks_deletion + 1; in jffs2_calc_trigger_levels()
352 dbg_fsbuild("trigger levels (size %d KiB, block size %d KiB, %d blocks)\n", in jffs2_calc_trigger_levels()
[all …]
/Linux-v5.15/include/linux/mtd/
Dspi-nor.h26 #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
42 #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
43 #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
44 #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
46 #define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */
72 #define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */
73 #define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */
74 #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
104 #define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
117 #define SR_WEL BIT(1) /* Write enable latch */
[all …]
/Linux-v5.15/tools/perf/arch/arm64/util/
Darm-spe.c27 #define KiB(x) ((x) * 1024) macro
96 bool privileged = perf_event_paranoid_check(-1); in arm_spe_recording_options()
109 evsel->core.attr.sample_period = 1; in arm_spe_recording_options()
123 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_recording_options()
125 opts->mmap_pages = KiB(256) / page_size; in arm_spe_recording_options()
132 size_t min_sz = KiB(8); in arm_spe_recording_options()
166 tracking_evsel->core.attr.sample_period = 1; in arm_spe_recording_options()
238 &attr->sample_period) != 1) { in arm_spe_pmu_default_config()
/Linux-v5.15/Documentation/filesystems/nfs/
Drpc-server-gss.rst8 NFSv4.1 and higher don't require the client to act as a server for the
55 A) It can handle tokens that are no bigger than 2KiB
58 beyond 64KiB in size due to various authorization extensions attacked to
65 back to the kernel (4KiB).
85 to /var/run/gssproxy.sock and then write "1" to
93 "1"--the read will block until gss-proxy has done its write to the file.
/Linux-v5.15/Documentation/arm/samsung-s3c24xx/
Dnand.rst11 The driver uses a 512 byte (1 page) ECC code for this setup. The
18 The driver is capable of handling NAND flash with a 2KiB page
22 each 256 byte block in an 2KiB page. This means that more than
/Linux-v5.15/lib/
Ddecompress_unxz.c53 * may be up to 64 KiB of actual payload in the chunk. Often the payload is
55 * chunk has only 32 KiB of payload.
75 * - 8 bytes per every 32 KiB of uncompressed size (one LZMA2 chunk header
76 * per chunk, each chunk having average payload size of 32 KiB); and
77 * - 64 KiB (biggest possible LZMA2 chunk payload size) to make sure that
119 #define XZ_INTERNAL_CRC32 1
272 s = xz_dec_init(XZ_DYNALLOC, (uint32_t)-1); in unxz()
279 b.out_size = (size_t)-1; in unxz()
379 return -1; in unxz()
390 return -1; in unxz()
/Linux-v5.15/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dnv44.c39 * allocated on 512KiB alignment, and not exceed a total size in nv44_mmu_init()
40 * of 512KiB for this to work correctly in nv44_mmu_init()
43 addr -= ((nvkm_memory_addr(pt) >> 19) + 1) << 19; in nv44_mmu_init()
59 .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV04}},
60 .mem = {{ -1, -1, NVIF_CLASS_MEM_NV04}, nv04_mem_new, nv04_mem_map },
61 .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv44_vmm_new, true },
/Linux-v5.15/include/linux/
Darm_ffa.h104 #define FFA_PARTITION_DIRECT_SEND BIT(1)
120 /* The base IPA of the constituent memory region, aligned to 4 kiB */
122 /* The number of 4 kiB pages in the constituent memory region. */
129 * The total number of 4 kiB pages included in this memory region. This
150 #define FFA_MEM_RW BIT(1)
174 #define FFA_MEM_NON_CACHEABLE (1 << 2)
177 #define FFA_DEV_nGnRE (1 << 2)
195 #define FFA_TIME_SLICE_ENABLE BIT(1)
198 #define FFA_MEM_RETRIEVE_TYPE_SHARE (1 << 3)
Dxz.h157 * or 2^n + 2^(n-1) bytes (the latter sizes are less common
159 * In the kernel, dictionary sizes of 64 KiB, 128 KiB, 256 KiB,
160 * 512 KiB, and 1 MiB are probably the only reasonable values,
246 # define XZ_INTERNAL_CRC32 1
/Linux-v5.15/Documentation/admin-guide/
Dperf-security.rst9 Usage of Performance Counters for Linux (perf_events) [1]_ , [2]_ , [3]_
19 1. System hardware and software configuration data, for example: a CPU
111 1. Create perf_users group of privileged Perf users, assign perf_users
175 1. Create shell script that uses capsh utility [16]_ to assign CAP_PERFMON
185 -rwxr-xr-x. 1 root root 83 Oct 13 23:57 /usr/local/bin/perf.shell
229 -1:
246 >=1:
291 is set to 516 KiB, then a user process is provided with 516 KiB * 8 =
292 4128 KiB of memory above the RLIMIT_MEMLOCK limit (ulimit -l) for
295 required to manually distribute the available 4128 KiB between the
[all …]

1234567891011