Home
last modified time | relevance | path

Searched +full:0 +full:x0aeb0000 (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.1/Documentation/devicetree/bindings/display/msm/
Ddpu-sdm845.yaml65 "^display-controller@[0-9a-f]+$":
118 port@0:
127 - port@0
164 reg = <0x0ae00000 0x1000>;
176 iommus = <&apps_smmu 0x880 0x8>,
177 <&apps_smmu 0xc80 0x8>;
182 reg = <0x0ae01000 0x8f000>,
183 <0x0aeb0000 0x2008>;
193 interrupts = <0>;
199 #size-cells = <0>;
[all …]
Ddpu-sc7180.yaml73 "^display-controller@[0-9a-f]+$":
130 port@0:
139 - port@0
176 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x800 0x2>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
211 interrupts = <0>;
217 #size-cells = <0>;
219 port@0 {
[all …]
Ddpu-sc7280.yaml72 "^display-controller@[0-9a-f]+$":
128 port@0:
137 - port@0
174 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x900 0x402>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
215 interrupts = <0>;
221 #size-cells = <0>;
223 port@0 {
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi61 #clock-cells = <0>;
67 #clock-cells = <0>;
77 reg = <0x0 0x80000000 0x0 0x600000>;
82 reg = <0x0 0x80600000 0x0 0x200000>;
87 reg = <0x0 0x80800000 0x0 0x20000>;
92 reg = <0x0 0x80820000 0x0 0x20000>;
98 reg = <0x0 0x808ff000 0x0 0x1000>;
103 reg = <0x0 0x80900000 0x0 0x200000>;
108 reg = <0x0 0x80b00000 0x0 0x3900000>;
113 reg = <0 0x8b700000 0 0x10000>;
[all …]
Dsdm845.dtsi75 reg = <0 0x80000000 0 0>;
84 reg = <0 0x85700000 0 0x600000>;
89 reg = <0 0x85e00000 0 0x100000>;
94 reg = <0 0x85fc0000 0 0x20000>;
100 reg = <0x0 0x85fe0000 0 0x20000>;
106 reg = <0x0 0x86000000 0 0x200000>;
112 reg = <0 0x86200000 0 0x2d00000>;
118 reg = <0 0x88f00000 0 0x200000>;
126 reg = <0 0x8ab00000 0 0x1400000>;
131 reg = <0 0x8bf00000 0 0x500000>;
[all …]
Dsc7280.dtsi77 #clock-cells = <0>;
83 #clock-cells = <0>;
94 reg = <0x0 0x004cd000 0x0 0x1000>;
98 reg = <0x0 0x80000000 0x0 0x600000>;
103 reg = <0x0 0x80600000 0x0 0x200000>;
108 reg = <0x0 0x80800000 0x0 0x60000>;
113 reg = <0x0 0x80860000 0x0 0x20000>;
119 reg = <0x0 0x80884000 0x0 0x10000>;
124 reg = <0x0 0x808ff000 0x0 0x1000>;
129 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
106 qcom,freq-domain = <&cpufreq_hw 0>;
123 reg = <0x0 0x100>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
144 reg = <0x0 0x200>;
151 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]