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Searched refs:riscv (Results 1 – 25 of 114) sorted by relevance

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/Linux-v6.6/drivers/gpu/drm/tegra/
Driscv.c32 static void riscv_writel(struct tegra_drm_riscv *riscv, u32 value, u32 offset) in riscv_writel() argument
34 writel(value, riscv->regs + offset); in riscv_writel()
37 int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv) in tegra_drm_riscv_read_descriptors() argument
39 struct tegra_drm_riscv_descriptor *bl = &riscv->bl_desc; in tegra_drm_riscv_read_descriptors()
40 struct tegra_drm_riscv_descriptor *os = &riscv->os_desc; in tegra_drm_riscv_read_descriptors()
41 const struct device_node *np = riscv->dev->of_node; in tegra_drm_riscv_read_descriptors()
47 dev_err(riscv->dev, "failed to read " name ": %d\n", err); \ in tegra_drm_riscv_read_descriptors()
62 dev_err(riscv->dev, "descriptors not available\n"); in tegra_drm_riscv_read_descriptors()
69 int tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address, in tegra_drm_riscv_boot_bootrom() argument
76 riscv_writel(riscv, RISCV_BCR_CTRL_CORE_SELECT_RISCV, RISCV_BCR_CTRL); in tegra_drm_riscv_boot_bootrom()
[all …]
Driscv.h26 int tegra_drm_riscv_read_descriptors(struct tegra_drm_riscv *riscv);
27 int tegra_drm_riscv_boot_bootrom(struct tegra_drm_riscv *riscv, phys_addr_t image_address,
Dnvdec.c51 struct tegra_drm_riscv riscv; member
118 err = tegra_drm_riscv_boot_bootrom(&nvdec->riscv, nvdec->carveout_base, 1, in nvdec_boot_riscv()
119 &nvdec->riscv.bl_desc); in nvdec_boot_riscv()
135 err = tegra_drm_riscv_boot_bootrom(&nvdec->riscv, nvdec->carveout_base, 1, in nvdec_boot_riscv()
136 &nvdec->riscv.os_desc); in nvdec_boot_riscv()
500 nvdec->riscv.dev = dev; in nvdec_probe()
501 nvdec->riscv.regs = nvdec->regs; in nvdec_probe()
503 err = tegra_drm_riscv_read_descriptors(&nvdec->riscv); in nvdec_probe()
/Linux-v6.6/arch/riscv/
DMakefile58 riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
59 riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
60 riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
61 riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
62 riscv-march-$(CONFIG_RISCV_ISA_V) := $(riscv-march-y)v
68 riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
72 riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
76 KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\…
78 KBUILD_AFLAGS += -march=$(riscv-march-y)
95 KBUILD_CFLAGS += $(call cc-option,-mno-riscv-attribute)
[all …]
/Linux-v6.6/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi26 compatible = "sifive,e51", "sifive,rocket0", "riscv";
32 riscv,isa = "rv64imac";
36 compatible = "riscv,cpu-intc";
41 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
53 mmu-type = "riscv,sv39";
55 riscv,isa = "rv64imafdc";
60 compatible = "riscv,cpu-intc";
65 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
77 mmu-type = "riscv,sv39";
79 riscv,isa = "rv64imafdc";
[all …]
Dfu740-c000.dtsi26 compatible = "sifive,bullet0", "riscv";
33 riscv,isa = "rv64imac";
37 compatible = "riscv,cpu-intc";
42 compatible = "sifive,bullet0", "riscv";
54 mmu-type = "riscv,sv39";
57 riscv,isa = "rv64imafdc";
61 compatible = "riscv,cpu-intc";
66 compatible = "sifive,bullet0", "riscv";
78 mmu-type = "riscv,sv39";
81 riscv,isa = "rv64imafdc";
[all …]
/Linux-v6.6/arch/riscv/boot/dts/thead/
Dth1520.dtsi20 compatible = "thead,c910", "riscv";
22 riscv,isa = "rv64imafdc";
31 mmu-type = "riscv,sv39";
34 compatible = "riscv,cpu-intc";
41 compatible = "thead,c910", "riscv";
43 riscv,isa = "rv64imafdc";
52 mmu-type = "riscv,sv39";
55 compatible = "riscv,cpu-intc";
62 compatible = "thead,c910", "riscv";
64 riscv,isa = "rv64imafdc";
[all …]
/Linux-v6.6/Documentation/riscv/
Dacpi.rst9 "riscv-isa-release-1239329-2023-05-23" (commit 1239329
10 ) <https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-1239329-2023-05-23>`_
Dfeatures.rst3 .. kernel-feat:: $srctree/Documentation/features riscv
/Linux-v6.6/arch/riscv/boot/dts/microchip/
Dmpfs.dtsi18 compatible = "sifive,e51", "sifive,rocket0", "riscv";
24 riscv,isa = "rv64imac";
30 compatible = "riscv,cpu-intc";
36 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
48 mmu-type = "riscv,sv39";
50 riscv,isa = "rv64imafdc";
58 compatible = "riscv,cpu-intc";
64 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
76 mmu-type = "riscv,sv39";
78 riscv,isa = "rv64imafdc";
[all …]
/Linux-v6.6/arch/riscv/boot/dts/renesas/
Dr9a07g043f.dtsi21 compatible = "andestech,ax45mp", "riscv";
26 riscv,isa = "rv64imafdc";
27 mmu-type = "riscv,sv39";
37 compatible = "riscv,cpu-intc";
51 riscv,ndev = <511>;
/Linux-v6.6/arch/riscv/boot/dts/allwinner/
Dsun20i-d1s.dtsi15 compatible = "thead,c906", "riscv";
25 mmu-type = "riscv,sv39";
27 riscv,isa = "rv64imafdc";
31 compatible = "riscv,cpu-intc";
71 riscv,ndev = <175>;
/Linux-v6.6/arch/riscv/boot/dts/starfive/
Djh7100.dtsi21 compatible = "sifive,u74-mc", "riscv";
34 mmu-type = "riscv,sv39";
35 riscv,isa = "rv64imafdc";
39 compatible = "riscv,cpu-intc";
46 compatible = "sifive,u74-mc", "riscv";
59 mmu-type = "riscv,sv39";
60 riscv,isa = "rv64imafdc";
64 compatible = "riscv,cpu-intc";
158 riscv,ndev = <133>;
Djh7110.dtsi23 compatible = "sifive,s7", "riscv";
30 riscv,isa = "rv64imac_zba_zbb";
34 compatible = "riscv,cpu-intc";
41 compatible = "sifive,u74-mc", "riscv";
54 mmu-type = "riscv,sv39";
56 riscv,isa = "rv64imafdc_zba_zbb";
64 compatible = "riscv,cpu-intc";
71 compatible = "sifive,u74-mc", "riscv";
84 mmu-type = "riscv,sv39";
86 riscv,isa = "rv64imafdc_zba_zbb";
[all …]
/Linux-v6.6/arch/riscv/purgatory/
DMakefile16 $(obj)/memcpy.o: $(srctree)/arch/riscv/lib/memcpy.S FORCE
19 $(obj)/memset.o: $(srctree)/arch/riscv/lib/memset.S FORCE
22 $(obj)/strcmp.o: $(srctree)/arch/riscv/lib/strcmp.S FORCE
25 $(obj)/strlen.o: $(srctree)/arch/riscv/lib/strlen.S FORCE
28 $(obj)/strncmp.o: $(srctree)/arch/riscv/lib/strncmp.S FORCE
/Linux-v6.6/drivers/firmware/efi/
DMakefile38 riscv-obj-$(CONFIG_EFI) := efi-init.o riscv-runtime.o
39 obj-$(CONFIG_RISCV) += $(riscv-obj-y)
/Linux-v6.6/arch/riscv/kernel/
Dvmlinux.lds.S25 OUTPUT_ARCH(riscv)
169 .riscv.attributes 0 : { *(.riscv.attributes) }
/Linux-v6.6/Documentation/translations/zh_CN/riscv/
Dpatch-acceptance.rst5 :Original: Documentation/riscv/patch-acceptance.rst
13 arch/riscv 开发者维护指南
/Linux-v6.6/arch/riscv/boot/dts/canaan/
Dk210.dtsi38 compatible = "canaan,k210", "riscv";
40 riscv,isa = "rv64imafdc";
41 mmu-type = "riscv,none";
49 compatible = "riscv,cpu-intc";
54 compatible = "canaan,k210", "riscv";
56 riscv,isa = "rv64imafdc";
57 mmu-type = "riscv,none";
65 compatible = "riscv,cpu-intc";
132 riscv,ndev = <65>;
/Linux-v6.6/tools/scripts/
DMakefile.arch8 -e s/riscv.*/riscv/ -e s/loongarch.*/loongarch/)
/Linux-v6.6/scripts/
Dsubarch.include13 -e s/riscv.*/riscv/ -e s/loongarch.*/loongarch/)
/Linux-v6.6/arch/arm/boot/dts/allwinner/
Dsun8i-t113s.dtsi7 #include <riscv/allwinner/sunxi-d1s-t113.dtsi>
8 #include <riscv/allwinner/sunxi-d1-t113.dtsi>
/Linux-v6.6/Documentation/devicetree/bindings/interrupt-controller/
Driscv,cpu-intc.txt27 - compatible : "riscv,cpu-intc"
45 compatible = "riscv";
49 compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
/Linux-v6.6/arch/riscv/boot/
Dloader.lds.S6 OUTPUT_ARCH(riscv)
/Linux-v6.6/Documentation/translations/it_IT/riscv/
Dpatch-acceptance.rst3 :Original: :doc:`../../../riscv/patch-acceptance`
6 arch/riscv linee guida alla manutenzione per gli sviluppatori

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