Searched refs:conf_regs (Results 1 – 2 of 2) sorted by relevance
81 u16 conf_regs[CM32181_CONF_REG_NUM]; member155 cm32181->conf_regs[i] = vals[CPM0_HEADER_SIZE + i]; in cm32181_acpi_parse_cpm_tables()213 cm32181->conf_regs[CM32181_REG_ADDR_CMD] = in cm32181_reg_init()226 cm32181->conf_regs[i]); in cm32181_reg_init()248 als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD]; in cm32181_read_als_it()287 cm32181->conf_regs[CM32181_REG_ADDR_CMD] &= in cm32181_write_als_it()289 cm32181->conf_regs[CM32181_REG_ADDR_CMD] |= in cm32181_write_als_it()292 cm32181->conf_regs[CM32181_REG_ADDR_CMD]); in cm32181_write_als_it()518 cm32181->conf_regs[CM32181_REG_ADDR_CMD]); in cm32181_resume()
138 void __iomem *conf_regs; member218 nfc->conf_regs + PL35X_SMC_DIRECT_CMD); in pl35x_smc_update_regs()226 writel(bw, nfc->conf_regs + PL35X_SMC_OPMODE); in pl35x_smc_set_buswidth()235 nfc->conf_regs + PL35X_SMC_MEMC_CFG_CLR); in pl35x_smc_clear_irq()243 ret = readl_poll_timeout(nfc->conf_regs + PL35X_SMC_MEMC_STATUS, reg, in pl35x_smc_wait_for_irq()261 ret = readl_poll_timeout(nfc->conf_regs + PL35X_SMC_ECC_STATUS, reg, in pl35x_smc_wait_for_ecc_done()278 ecc_cfg = readl(nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_smc_set_ecc_mode()281 writel(ecc_cfg, nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_smc_set_ecc_mode()322 writel(plnand->timings, nfc->conf_regs + PL35X_SMC_CYCLES); in pl35x_nand_select_target()326 writel(plnand->ecc_cfg, nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_nand_select_target()[all …]
