Home
last modified time | relevance | path

Searched refs:MDIO_MMD_VEND1 (Results 1 – 20 of 20) sorted by relevance

/Linux-v6.6/drivers/net/phy/
Dnxp-c45-tja11xx.c397 ts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
399 ts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
401 ts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
403 ts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64()
428 phy_write_mmd(priv->phydev, MDIO_MMD_VEND1, regmap->vend1_ltc_wr_nsec_0, in _nxp_c45_ptp_settime64()
430 phy_write_mmd(priv->phydev, MDIO_MMD_VEND1, regmap->vend1_ltc_wr_nsec_1, in _nxp_c45_ptp_settime64()
432 phy_write_mmd(priv->phydev, MDIO_MMD_VEND1, regmap->vend1_ltc_wr_sec_0, in _nxp_c45_ptp_settime64()
434 phy_write_mmd(priv->phydev, MDIO_MMD_VEND1, regmap->vend1_ltc_wr_sec_1, in _nxp_c45_ptp_settime64()
468 phy_write_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_ptp_adjfine()
476 phy_write_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_ptp_adjfine()
[all …]
Dmediatek-ge-soc.c330 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
333 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in cal_cycle()
342 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
344 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP) >> in cal_cycle()
353 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG5, in rext_fill_result()
374 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_A_B, in tx_offset_fill_result()
376 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_A_B, in tx_offset_fill_result()
378 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_C_D, in tx_offset_fill_result()
380 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_C_D, in tx_offset_fill_result()
433 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG, in tx_amp_fill_result()
[all …]
Dmediatek-ge.c40 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x123, 0xffff); in mtk_gephy_config_init()
43 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xa6, 0x300); in mtk_gephy_config_init()
62 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, 0xc6, 0x300); in mt7531_phy_config_init()
65 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x13, 0x404); in mt7531_phy_config_init()
66 phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x14, 0x404); in mt7531_phy_config_init()
Dadin.c260 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode()
264 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode()
296 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rgmii_mode()
306 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode()
310 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode()
323 return phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_config_rmii_mode()
468 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_CLK_CFG_REG, in adin_config_clk_out()
559 if (devad == MDIO_MMD_VEND1) in adin_cl45_to_adin_reg()
727 rc = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset()
736 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset()
[all …]
Daquantia_main.c303 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_STD_MASK, in aqr_config_intr()
308 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_INT_VEND_MASK, in aqr_config_intr()
407 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate()
535 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in aqr107_wait_reset_complete()
545 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info()
552 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1); in aqr107_chip_info()
647 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT9); in aqr107_link_change_notify()
667 err = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in aqr107_wait_processor_intensive_op()
694 err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_suspend()
706 err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MDIO_CTRL1, in aqr107_resume()
Dadin1100.c145 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, in adin_set_powerdown_mode()
150 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret, in adin_set_powerdown_mode()
180 ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, ADIN_CRSM_SFT_RST, ADIN_CRSM_SFT_RST_EN); in adin_soft_reset()
184 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret, in adin_soft_reset()
Dmxl-gpy.c166 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA); in gpy_hwmon_read()
232 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_ADDRLO, in gpy_mbox_read()
240 ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_CMD, cmd); in gpy_mbox_read()
249 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in gpy_mbox_read()
256 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_DATA); in gpy_mbox_read()
350 phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, in gpy_2500basex_chk()
359 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL); in gpy_sgmii_aneg_en()
477 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, in gpy_config_aneg()
524 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, in gpy_update_interface()
542 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL, in gpy_update_interface()
Dteranetics.c39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done()
54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status()
Daquantia_hwmon.c58 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get()
79 return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp); in aqr_hwmon_set()
84 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
Dbcm84881.c197 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
Dphy_device.c796 if (i == MDIO_MMD_VEND1 || i == MDIO_MMD_VEND2) { in get_phy_c45_ids()
834 if (i == MDIO_MMD_VEND1 || i == MDIO_MMD_VEND2) { in get_phy_c45_ids()
/Linux-v6.6/drivers/net/ethernet/chelsio/cxgb3/
Daq100x.c71 int err = t3_phy_reset(phy, MDIO_MMD_VEND1, 3000); in aq100x_reset()
86 err = t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, IMASK_GLOBAL); in aq100x_intr_enable()
92 return t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, 0); in aq100x_intr_disable()
99 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &v); in aq100x_intr_clear()
110 err = t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &cause); in aq100x_intr_handler()
292 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); in t3_aq100x_phy_prep()
319 t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_FW_VERSION, &v); in t3_aq100x_phy_prep()
328 err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v); in t3_aq100x_phy_prep()
332 err = t3_mdio_change_bits(phy, MDIO_MMD_VEND1, MDIO_CTRL1, in t3_aq100x_phy_prep()
/Linux-v6.6/drivers/net/ethernet/aquantia/atlantic/macsec/
Dmacsec_api.c83 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record()
86 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record()
94 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record()
97 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record()
108 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in set_raw_ingress_record()
111 aq_mss_mdio_write(hw, MDIO_MMD_VEND1, MSS_INGRESS_LUT_CTL_REGISTER_ADDR, in set_raw_ingress_record()
137 ret = aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in get_raw_ingress_record()
142 ret = aq_mss_mdio_write(hw, MDIO_MMD_VEND1, in get_raw_ingress_record()
151 ret = aq_mss_mdio_read(hw, MDIO_MMD_VEND1, in get_raw_ingress_record()
157 ret = aq_mss_mdio_read(hw, MDIO_MMD_VEND1, in get_raw_ingress_record()
[all …]
/Linux-v6.6/drivers/net/dsa/mv88e6xxx/
Dpcs-639x.c678 { MDIO_MMD_VEND1, 0x8093, 0xcb5a, 0xffff }, in mv88e6393x_erratum_5_2()
679 { MDIO_MMD_VEND1, 0x8171, 0x7088, 0xffff }, in mv88e6393x_erratum_5_2()
680 { MDIO_MMD_VEND1, 0x80c9, 0x311a, 0xffff }, in mv88e6393x_erratum_5_2()
681 { MDIO_MMD_VEND1, 0x80a2, 0x8000, 0xff7f }, in mv88e6393x_erratum_5_2()
682 { MDIO_MMD_VEND1, 0x80a9, 0x0000, 0xfff0 }, in mv88e6393x_erratum_5_2()
683 { MDIO_MMD_VEND1, 0x80a3, 0x0000, 0xf8ff }, in mv88e6393x_erratum_5_2()
734 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_VEND1, 0x8000, 0x58); in mv88e6393x_fix_2500basex_an()
/Linux-v6.6/drivers/net/ethernet/aquantia/atlantic/
Daq_phy.c165 val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1, in aq_phy_disable_ptp()
168 aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1, in aq_phy_disable_ptp()
/Linux-v6.6/include/uapi/linux/
Dmdio.h27 #define MDIO_MMD_VEND1 30 /* Vendor specific 1 */ macro
156 #define MDIO_DEVS_VEND1 MDIO_DEVS_PRESENT(MDIO_MMD_VEND1)
/Linux-v6.6/drivers/net/ethernet/intel/ixgbe/
Dixgbe_x550.c2388 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em()
2396 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em()
2405 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em()
2420 MDIO_MMD_VEND1, in ixgbe_get_lasi_ext_t_x550em()
2500 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em()
2509 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em()
2516 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em()
2525 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em()
2532 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em()
2540 MDIO_MMD_VEND1, in ixgbe_enable_lasi_ext_t_x550em()
[all …]
Dixgbe_phy.c1304 MDIO_MMD_VEND1, in ixgbe_check_phy_link_tnx()
2785 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, &reg); in ixgbe_set_copper_phy_power()
2797 status = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg); in ixgbe_set_copper_phy_power()
/Linux-v6.6/drivers/net/ethernet/microchip/
Dlan743x_ethtool.c1232 { ETH_SR_VSMMD_DEV_ID1, MDIO_MMD_VEND1, 0x0002}, in lan743x_sgmii_regs()
1233 { ETH_SR_VSMMD_DEV_ID2, MDIO_MMD_VEND1, 0x0003}, in lan743x_sgmii_regs()
1234 { ETH_SR_VSMMD_PCS_ID1, MDIO_MMD_VEND1, 0x0004}, in lan743x_sgmii_regs()
1235 { ETH_SR_VSMMD_PCS_ID2, MDIO_MMD_VEND1, 0x0005}, in lan743x_sgmii_regs()
1236 { ETH_SR_VSMMD_STS, MDIO_MMD_VEND1, 0x0008}, in lan743x_sgmii_regs()
1237 { ETH_SR_VSMMD_CTRL, MDIO_MMD_VEND1, 0x0009}, in lan743x_sgmii_regs()
/Linux-v6.6/drivers/net/dsa/sja1105/
Dsja1105_mdio.c20 if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) in sja1105_pcs_mdio_read_c45()
46 if (mmd != MDIO_MMD_VEND1 && mmd != MDIO_MMD_VEND2) in sja1105_pcs_mdio_write_c45()