Searched refs:DPLL_CTRL2_DDI_CLK_SEL (Results 1 – 3 of 3) sorted by relevance
405 DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_B); in emulate_monitor_status_change()431 DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_C); in emulate_monitor_status_change()457 DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_D); in emulate_monitor_status_change()
1884 DPLL_CTRL2_DDI_CLK_SEL(pll->info->id, port) | in skl_ddi_enable_clock()
5980 #define DPLL_CTRL2_DDI_CLK_SEL(clk, port) ((clk) << ((port) * 3 + 1)) macro
