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Searched refs:CLK_PERI_UART0_SEL (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.6/include/dt-bindings/clock/
Dmt8135-clk.h180 #define CLK_PERI_UART0_SEL 42 macro
Dmediatek,mt6795-clk.h205 #define CLK_PERI_UART0_SEL 30 macro
Dmt8173-clk.h229 #define CLK_PERI_UART0_SEL 36 macro
Dmt2701-clk.h268 #define CLK_PERI_UART0_SEL 45 macro
/Linux-v6.6/drivers/clk/mediatek/
Dclk-mt8173-pericfg.c42 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
Dclk-mt6795-pericfg.c33 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
Dclk-mt8135.c500 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),
Dclk-mt2701.c871 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents,
/Linux-v6.6/arch/arm/boot/dts/mediatek/
Dmt8135.dtsi226 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
Dmt2701.dtsi259 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
Dmt7623.dtsi380 clocks = <&pericfg CLK_PERI_UART0_SEL>,
/Linux-v6.6/arch/arm64/boot/dts/mediatek/
Dmt6795.dtsi491 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
Dmt8173.dtsi672 clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;