Searched refs:reg_enable (Results 1 – 4 of 4) sorted by relevance
| /Linux-v6.1/drivers/irqchip/ |
| D | irq-bcm6345-l1.c | 90 static inline unsigned int reg_enable(struct bcm6345_l1_chip *intc, in reg_enable() function
137 pending &= __raw_readl(cpu->map_base + reg_enable(intc, idx)); in bcm6345_l1_irq_handle()
157 intc->cpus[cpu_idx]->map_base + reg_enable(intc, word)); in __bcm6345_l1_unmask()
169 intc->cpus[cpu_idx]->map_base + reg_enable(intc, word)); in __bcm6345_l1_mask()
262 __raw_writel(0, cpu->map_base + reg_enable(intc, i)); in bcm6345_l1_init_one()
|
| D | irq-bcm2835.c | 70 static const int reg_enable[] __initconst = { 0x18, 0x10, 0x14 }; variable
152 intc.enable[b] = base + reg_enable[b]; in armctrl_of_init()
|
| /Linux-v6.1/drivers/cpufreq/ |
| D | qcom-cpufreq-hw.c | 32 u32 reg_enable; member
378 .reg_enable = 0x0,
388 .reg_enable = 0x0,
559 if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) { in qcom_cpufreq_hw_cpu_init()
|
| /Linux-v6.1/arch/arm64/kernel/ |
| D | hw_breakpoint.c | 228 int i, max_slots, ctrl_reg, val_reg, reg_enable; in hw_breakpoint_control() local
238 reg_enable = !debug_info->bps_disabled; in hw_breakpoint_control()
245 reg_enable = !debug_info->wps_disabled; in hw_breakpoint_control()
268 reg_enable ? ctrl | 0x1 : ctrl & ~0x1); in hw_breakpoint_control()
|
