| /Linux-v6.1/drivers/clk/tegra/ |
| D | clk-tegra124.c | 153 { .pdiv = 1, .hw_val = 0 },
154 { .pdiv = 2, .hw_val = 1 },
155 { .pdiv = 3, .hw_val = 2 },
156 { .pdiv = 4, .hw_val = 3 },
157 { .pdiv = 5, .hw_val = 4 },
158 { .pdiv = 6, .hw_val = 5 },
159 { .pdiv = 8, .hw_val = 6 },
160 { .pdiv = 10, .hw_val = 7 },
161 { .pdiv = 12, .hw_val = 8 },
162 { .pdiv = 16, .hw_val = 9 },
[all …]
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| D | clk-tegra114.c | 149 { .pdiv = 1, .hw_val = 0 },
150 { .pdiv = 2, .hw_val = 1 },
151 { .pdiv = 3, .hw_val = 2 },
152 { .pdiv = 4, .hw_val = 3 },
153 { .pdiv = 5, .hw_val = 4 },
154 { .pdiv = 6, .hw_val = 5 },
155 { .pdiv = 8, .hw_val = 6 },
156 { .pdiv = 10, .hw_val = 7 },
157 { .pdiv = 12, .hw_val = 8 },
158 { .pdiv = 16, .hw_val = 9 },
[all …]
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| D | clk-tegra210.c | 1465 pllx->params->pdiv_tohw[cfg->p].pdiv / 1000); in tegra210_pllx_dyn_ramp()
1486 u32 pdiv; in tegra210_pll_fixed_mdiv_cfg() local
1493 p = params->round_p_to_pdiv(p, &pdiv); in tegra210_pll_fixed_mdiv_cfg()
1580 { .pdiv = 1, .hw_val = 0 },
1581 { .pdiv = 2, .hw_val = 1 },
1582 { .pdiv = 3, .hw_val = 2 },
1583 { .pdiv = 4, .hw_val = 3 },
1584 { .pdiv = 5, .hw_val = 4 },
1585 { .pdiv = 6, .hw_val = 5 },
1586 { .pdiv = 8, .hw_val = 6 },
[all …]
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| /Linux-v6.1/drivers/clk/samsung/ |
| D | clk-pll.c | 153 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local
158 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK; in samsung_pll2126_recalc_rate()
162 do_div(fvco, (pdiv + 2) << sdiv); in samsung_pll2126_recalc_rate()
186 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local
191 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK; in samsung_pll3000_recalc_rate()
195 do_div(fvco, pdiv << sdiv); in samsung_pll3000_recalc_rate()
223 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() local
228 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; in samsung_pll35xx_recalc_rate()
232 do_div(fvco, (pdiv << sdiv)); in samsung_pll35xx_recalc_rate()
245 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change()
[all …]
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| D | clk-pll.h | 55 .pdiv = (_p), \
64 .pdiv = (_p), \
73 .pdiv = (_p), \
82 .pdiv = (_p), \
92 .pdiv = (_p), \
102 .pdiv = (_p), \
113 .pdiv = (_p), \
125 unsigned int pdiv; member
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| /Linux-v6.1/drivers/clk/imx/ |
| D | clk-pll14xx.c | 104 static long pll14xx_calc_rate(struct clk_pll14xx *pll, int mdiv, int pdiv, in pll14xx_calc_rate() argument
111 pdiv *= 65536; in pll14xx_calc_rate()
113 do_div(fvco, pdiv << sdiv); in pll14xx_calc_rate()
118 static long pll1443x_calc_kdiv(int mdiv, int pdiv, int sdiv, in pll1443x_calc_kdiv() argument
124 kdiv = ((rate * ((pdiv * 65536) << sdiv) + prate / 2) / prate) - (mdiv * 65536); in pll1443x_calc_kdiv()
133 int mdiv, pdiv, sdiv, kdiv; in imx_pll14xx_calc_settings() local
156 t->pdiv = tt->pdiv; in imx_pll14xx_calc_settings()
164 pdiv = FIELD_GET(PDIV_MASK, pll_div_ctl0); in imx_pll14xx_calc_settings()
169 rate_min = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MIN, prate); in imx_pll14xx_calc_settings()
170 rate_max = pll14xx_calc_rate(pll, mdiv, pdiv, sdiv, KDIV_MAX, prate); in imx_pll14xx_calc_settings()
[all …]
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| /Linux-v6.1/drivers/cpufreq/ |
| D | s3c2412-cpufreq.c | 51 unsigned int hdiv, pdiv, armdiv, dvs; in s3c2412_cpufreq_calcdivs() local
99 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2412_cpufreq_calcdivs()
101 if ((hclk / pdiv) > cfg->max.pclk) in s3c2412_cpufreq_calcdivs()
102 pdiv++; in s3c2412_cpufreq_calcdivs()
104 cfg->freq.pclk = hclk / pdiv; in s3c2412_cpufreq_calcdivs()
106 s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv); in s3c2412_cpufreq_calcdivs()
108 if (pdiv > 2) in s3c2412_cpufreq_calcdivs()
111 pdiv *= hdiv; in s3c2412_cpufreq_calcdivs()
116 cfg->divs.p_divisor = pdiv * armdiv; in s3c2412_cpufreq_calcdivs()
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| D | s3c2440-cpufreq.c | 69 unsigned int hdiv, pdiv; in s3c2440_cpufreq_calcdivs() local
103 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2440_cpufreq_calcdivs()
105 if ((hclk / pdiv) > cfg->max.pclk) in s3c2440_cpufreq_calcdivs()
106 pdiv++; in s3c2440_cpufreq_calcdivs()
108 s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv); in s3c2440_cpufreq_calcdivs()
110 if (pdiv > 2) in s3c2440_cpufreq_calcdivs()
113 pdiv *= hdiv; in s3c2440_cpufreq_calcdivs()
134 cfg->divs.p_divisor = pdiv; in s3c2440_cpufreq_calcdivs()
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| D | s3c2410-cpufreq.c | 46 unsigned int hdiv, pdiv; in s3c2410_cpufreq_calcdivs() local
65 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2410_cpufreq_calcdivs()
66 pclk = hclk / pdiv; in s3c2410_cpufreq_calcdivs()
73 pdiv *= hdiv; in s3c2410_cpufreq_calcdivs()
76 cfg->divs.p_divisor = pdiv; in s3c2410_cpufreq_calcdivs()
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| D | brcmstb-avs-cpufreq.c | 341 static void brcm_avs_parse_p1(u32 p1, unsigned int *mdiv_p0, unsigned int *pdiv, in brcm_avs_parse_p1() argument
345 *pdiv = (p1 >> PDIV_SHIFT) & PDIV_MASK; in brcm_avs_parse_p1()
679 unsigned int ndiv, pdiv; in show_brcm_avs_pmap() local
685 brcm_avs_parse_p1(pmap.p1, &mdiv_p0, &pdiv, &ndiv); in show_brcm_avs_pmap()
689 pmap.p1, pmap.p2, ndiv, pdiv, mdiv_p0, mdiv_p1, mdiv_p2, in show_brcm_avs_pmap()
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| /Linux-v6.1/arch/arm/mach-s3c/ |
| D | regs-s3c2443-clock.h | 153 unsigned int mdiv, pdiv, sdiv; in s3c2443_get_mpll() local
157 pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; in s3c2443_get_mpll()
161 pdiv &= S3C2443_PLLCON_PDIVMASK; in s3c2443_get_mpll()
165 do_div(fvco, pdiv << sdiv); in s3c2443_get_mpll()
173 unsigned int mdiv, pdiv, sdiv; in s3c2443_get_epll() local
177 pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; in s3c2443_get_epll()
181 pdiv &= S3C2443_PLLCON_PDIVMASK; in s3c2443_get_epll()
185 do_div(fvco, (pdiv + 2) << sdiv); in s3c2443_get_epll()
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| /Linux-v6.1/drivers/clk/ |
| D | clk-cdce925.c | 68 u16 pdiv; /* 1..127 for Y2-Y9; 1..1023 for Y1 */ member
289 static void cdce925_clk_set_pdiv(struct clk_cdce925_output *data, u16 pdiv) in cdce925_clk_set_pdiv() argument
295 0x03, (pdiv >> 8) & 0x03); in cdce925_clk_set_pdiv()
296 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF); in cdce925_clk_set_pdiv()
299 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv); in cdce925_clk_set_pdiv()
302 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv); in cdce925_clk_set_pdiv()
305 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv); in cdce925_clk_set_pdiv()
308 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv); in cdce925_clk_set_pdiv()
311 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv); in cdce925_clk_set_pdiv()
314 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv); in cdce925_clk_set_pdiv()
[all …]
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| /Linux-v6.1/drivers/clk/bcm/ |
| D | clk-iproc-pll.c | 104 vco_out->pdiv = 1; in pll_calc_param()
282 unsigned int pdiv; in pll_fractional_change_only() local
296 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_fractional_change_only()
297 pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); in pll_fractional_change_only()
299 if (pdiv != vco->pdiv) in pll_fractional_change_only()
321 if (vco->pdiv == 0) in pll_set_rate()
324 ref_freq = parent_rate / vco->pdiv; in pll_set_rate()
411 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_set_rate()
412 val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift); in pll_set_rate()
413 val |= vco->pdiv << ctrl->pdiv.shift; in pll_set_rate()
[all …]
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| D | clk-iproc-armpll.c | 192 unsigned int pdiv; in iproc_arm_pll_recalc_rate() local
208 pdiv = (val >> IPROC_CLK_PLLARMA_PDIV_SHIFT) & in iproc_arm_pll_recalc_rate()
210 if (pdiv == 0) in iproc_arm_pll_recalc_rate()
211 pdiv = 16; in iproc_arm_pll_recalc_rate()
220 pll->rate = (pll->rate / pdiv) / mdiv; in iproc_arm_pll_recalc_rate()
225 (unsigned int)(ndiv >> 20), pdiv, mdiv); in iproc_arm_pll_recalc_rate()
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| D | clk-sr.c | 43 .pdiv = REG_VAL(0x14, 0, 4),
103 .pdiv = REG_VAL(0x14, 0, 4),
162 .pdiv = REG_VAL(0x14, 0, 4),
197 .pdiv = REG_VAL(0x14, 0, 4),
251 .pdiv = REG_VAL(0x14, 0, 4),
287 .pdiv = REG_VAL(0x4, 26, 4),
332 .pdiv = REG_VAL(0x4, 26, 4),
371 .pdiv = REG_VAL(0x4, 26, 4),
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| D | clk-ns2.c | 37 .pdiv = REG_VAL(0x8, 0, 4),
100 .pdiv = REG_VAL(0x8, 0, 4),
162 .pdiv = REG_VAL(0x8, 0, 4),
224 .pdiv = REG_VAL(0x8, 0, 4),
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| D | clk-cygnus.c | 56 .pdiv = REG_VAL(0x14, 0, 4),
114 .pdiv = REG_VAL(0x4, 26, 4),
192 .pdiv = REG_VAL(0x14, 0, 4),
271 .pdiv = REG_VAL(0x44, 0, 4),
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| D | clk-iproc.h | 88 unsigned int pdiv; member
164 struct iproc_clk_reg_op pdiv; member
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| D | clk-nsp.c | 42 .pdiv = REG_VAL(0x18, 24, 3),
99 .pdiv = REG_VAL(0x4, 28, 3),
|
| /Linux-v6.1/drivers/thermal/tegra/ |
| D | tegra124-soctherm.c | 51 .pdiv = 8,
70 .pdiv = 8,
89 .pdiv = 8,
106 .pdiv = 8,
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| D | tegra132-soctherm.c | 51 .pdiv = 8,
70 .pdiv = 8,
89 .pdiv = 8,
106 .pdiv = 8,
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| D | tegra210-soctherm.c | 52 .pdiv = 8,
71 .pdiv = 8,
90 .pdiv = 8,
107 .pdiv = 8,
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| D | soctherm.h | 77 u32 pdiv, pdiv_ate, pdiv_mask; member
89 u32 tall, tiddq_en, ten_count, pdiv, pdiv_ate, tsample, tsample_ate; member
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| /Linux-v6.1/drivers/gpu/drm/i915/display/ |
| D | intel_dpll_mgr.c | 1482 u32 pdiv; member
1507 params->pdiv = 0; in skl_wrpll_params_populate()
1510 params->pdiv = 1; in skl_wrpll_params_populate()
1513 params->pdiv = 2; in skl_wrpll_params_populate()
1516 params->pdiv = 4; in skl_wrpll_params_populate()
1724 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) | in skl_ddi_hdmi_pll_dividers()
2391 static void icl_wrpll_get_multipliers(int bestdiv, int *pdiv, in icl_wrpll_get_multipliers() argument
2397 *pdiv = 2; in icl_wrpll_get_multipliers()
2401 *pdiv = 2; in icl_wrpll_get_multipliers()
2405 *pdiv = 3; in icl_wrpll_get_multipliers()
[all …]
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| /Linux-v6.1/drivers/clk/st/ |
| D | clk-flexgen.c | 39 struct clk_divider pdiv; member
142 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; in flexgen_recalc_rate()
158 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; in flexgen_set_rate()
243 fgxbar->pdiv.lock = lock; in clk_register_flexgen()
244 fgxbar->pdiv.reg = reg + 0x58 + idx * 4; in clk_register_flexgen()
245 fgxbar->pdiv.width = 10; in clk_register_flexgen()
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