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Searched refs:dcore_offset (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/misc/habanalabs/common/
Dsecurity.c279 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_with_mask() argument
305 i * dcore_offset + j * instance_offset, in hl_init_pb_with_mask()
330 int hl_init_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, in hl_init_pb() argument
335 return hl_init_pb_with_mask(hdev, num_dcores, dcore_offset, in hl_init_pb()
359 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges_with_mask() argument
389 i * dcore_offset + j * instance_offset, in hl_init_pb_ranges_with_mask()
417 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges() argument
421 return hl_init_pb_ranges_with_mask(hdev, num_dcores, dcore_offset, in hl_init_pb_ranges()
441 int hl_init_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset, in hl_init_pb_single_dcore() argument
464 dcore_offset + i * instance_offset, in hl_init_pb_single_dcore()
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Dhabanalabs.h3916 u32 dcore_offset, u32 num_instances, u32 instance_offset,
3919 int hl_init_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset,
3924 u32 dcore_offset, u32 num_instances, u32 instance_offset,
3929 u32 dcore_offset, u32 num_instances, u32 instance_offset,
3933 int hl_init_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset,
3937 int hl_init_pb_ranges_single_dcore(struct hl_device *hdev, u32 dcore_offset,
3942 void hl_ack_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset,
3946 u32 dcore_offset, u32 num_instances, u32 instance_offset,
3948 void hl_ack_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset,
/Linux-v6.1/drivers/misc/habanalabs/gaudi2/
Dgaudi2.c6613 u32 dcore_offset = dcore_id * DCORE_OFFSET; in gaudi2_mmu_dcore_prepare() local
6620 WREG32(mmDCORE0_EDMA0_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
6621 WREG32(mmDCORE0_EDMA0_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
6622 WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
6623 WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
6627 WREG32(mmDCORE0_EDMA1_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
6628 WREG32(mmDCORE0_EDMA1_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
6629 WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid); in gaudi2_mmu_dcore_prepare()
6630 WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0); in gaudi2_mmu_dcore_prepare()
6634 WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV + dcore_offset, asid); in gaudi2_mmu_dcore_prepare()
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