Searched refs:adpa (Results 1 – 4 of 4) sorted by relevance
169 u32 adpa; in intel_crt_set_dpms() local172 adpa = ADPA_HOTPLUG_BITS; in intel_crt_set_dpms()174 adpa = 0; in intel_crt_set_dpms()177 adpa |= ADPA_HSYNC_ACTIVE_HIGH; in intel_crt_set_dpms()179 adpa |= ADPA_VSYNC_ACTIVE_HIGH; in intel_crt_set_dpms()185 adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe); in intel_crt_set_dpms()187 adpa |= ADPA_PIPE_SEL(crtc->pipe); in intel_crt_set_dpms()194 adpa |= ADPA_DAC_ENABLE; in intel_crt_set_dpms()197 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; in intel_crt_set_dpms()200 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; in intel_crt_set_dpms()[all …]
95 u32 adpa, dpll_md; in cdv_intel_crt_mode_set() local115 adpa = 0; in cdv_intel_crt_mode_set()117 adpa |= ADPA_HSYNC_ACTIVE_HIGH; in cdv_intel_crt_mode_set()119 adpa |= ADPA_VSYNC_ACTIVE_HIGH; in cdv_intel_crt_mode_set()122 adpa |= ADPA_PIPE_A_SELECT; in cdv_intel_crt_mode_set()124 adpa |= ADPA_PIPE_B_SELECT; in cdv_intel_crt_mode_set()126 REG_WRITE(adpa_reg, adpa); in cdv_intel_crt_mode_set()
573 hw->adpa = INREG(ADPA); in intelfbhw_read_hw_state()801 printk(" ADPA: 0x%08x\n", hw->adpa); in intelfbhw_print_hw_state()1084 hw->adpa &= ~ADPA_USE_VGA_HVPOLARITY; in intelfbhw_mode_to_hw()1091 hw->adpa &= ~((ADPA_SYNC_ACTIVE_MASK << ADPA_VSYNC_ACTIVE_SHIFT) | in intelfbhw_mode_to_hw()1093 hw->adpa |= (hsync_pol << ADPA_HSYNC_ACTIVE_SHIFT) | in intelfbhw_mode_to_hw()1097 hw->adpa &= ~(PIPE_MASK << ADPA_PIPE_SELECT_SHIFT); in intelfbhw_mode_to_hw()1098 hw->adpa |= (pipe << ADPA_PIPE_SELECT_SHIFT); in intelfbhw_mode_to_hw()1101 hw->adpa &= ~ADPA_DPMS_CONTROL_MASK; in intelfbhw_mode_to_hw()1102 hw->adpa |= ADPA_DPMS_D0; in intelfbhw_mode_to_hw()1104 hw->adpa |= ADPA_DAC_ENABLE; in intelfbhw_mode_to_hw()[all …]
200 u32 adpa; member
