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Searched refs:CLK_TOP_VENC_LT_SEL (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt8173-clk.h115 #define CLK_TOP_VENC_LT_SEL 105 macro
/Linux-v6.1/Documentation/devicetree/bindings/soc/mediatek/
Dscpsys.txt69 <&topckgen CLK_TOP_VENC_LT_SEL>;
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi487 <&topckgen CLK_TOP_VENC_LT_SEL>;
1403 <&topckgen CLK_TOP_VENC_LT_SEL>,
1413 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>,
1516 clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
1518 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8173.c571 MUX_GATE(CLK_TOP_VENC_LT_SEL, "venclt_sel", venc_lt_parents, 0x0090, 24, 4, 31),