Home
last modified time | relevance | path

Searched refs:CLK_TOP_RTC_SEL (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt8173-clk.h130 #define CLK_TOP_RTC_SEL 120 macro
Dmt2712-clk.h168 #define CLK_TOP_RTC_SEL 137 macro
Dmt2701-clk.h112 #define CLK_TOP_RTC_SEL 101 macro
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8173.c594 MUX(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents, 0x00d0, 24, 2),
853 clk_prepare_enable(mt8173_top_clk_data->hws[CLK_TOP_RTC_SEL]->clk); in mtk_clk_enable_critical()
Dclk-mt2701.c541 MUX_GATE_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents,
Dclk-mt2712.c824 MUX_GATE_FLAGS(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents, 0x0d0, 24, 2,
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi535 <&topckgen CLK_TOP_RTC_SEL>;