| /Linux-v6.1/include/dt-bindings/clock/ |
| D | mt6797-clk.h | 102 #define CLK_TOP_MSDCPLL_D2 92 macro
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| D | mediatek,mt6795-clk.h | 46 #define CLK_TOP_MSDCPLL_D2 35 macro
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| D | mt6765-clk.h | 75 #define CLK_TOP_MSDCPLL_D2 40 macro
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| D | mt8173-clk.h | 48 #define CLK_TOP_MSDCPLL_D2 38 macro
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| D | mediatek,mt8365-clk.h | 64 #define CLK_TOP_MSDCPLL_D2 54 macro
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| D | mt6779-clk.h | 97 #define CLK_TOP_MSDCPLL_D2 87 macro
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| D | mt8183-clk.h | 122 #define CLK_TOP_MSDCPLL_D2 86 macro
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| D | mt8186-clk.h | 130 #define CLK_TOP_MSDCPLL_D2 111 macro
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| D | mt2712-clk.h | 111 #define CLK_TOP_MSDCPLL_D2 80 macro
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| D | mt2701-clk.h | 48 #define CLK_TOP_MSDCPLL_D2 38 macro
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| D | mt8192-clk.h | 137 #define CLK_TOP_MSDCPLL_D2 125 macro
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| D | mt8195-clk.h | 203 #define CLK_TOP_MSDCPLL_D2 191 macro
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| /Linux-v6.1/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 399 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt8186-topckgen.c | 65 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt6797.c | 84 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1, 2),
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| D | clk-mt8195-topckgen.c | 105 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt2701.c | 99 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt6779.c | 99 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt2712.c | 205 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1,
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| D | clk-mt6765.c | 125 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll_ck", 1, 2),
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| D | clk-mt8183.c | 156 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1,
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| D | clk-mt8365.c | 85 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt8173.c | 81 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| D | clk-mt8192.c | 90 FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2),
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| /Linux-v6.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8183-kukui.dtsi | 392 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
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