Searched refs:CLK_TOP_MSDC30_2_SEL (Results 1 – 12 of 12) sorted by relevance
| /Linux-v6.1/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 82 #define CLK_TOP_MSDC30_2_SEL 71 macro
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| D | mediatek,mt6795-clk.h | 106 #define CLK_TOP_MSDC30_2_SEL 95 macro
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| D | mt8173-clk.h | 108 #define CLK_TOP_MSDC30_2_SEL 98 macro
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| D | mt2712-clk.h | 145 #define CLK_TOP_MSDC30_2_SEL 114 macro
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| D | mt2701-clk.h | 101 #define CLK_TOP_MSDC30_2_SEL 90 macro
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| D | mt8192-clk.h | 38 #define CLK_TOP_MSDC30_2_SEL 26 macro
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| /Linux-v6.1/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 476 TOP_MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_2_parents, 0x80, 0, 3, 7, 0),
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| D | clk-mt8135.c | 366 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents, 0x0148, 8, 3, 15),
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| D | clk-mt2701.c | 518 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents,
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| D | clk-mt2712.c | 773 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel",
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| D | clk-mt8173.c | 563 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_2_parents, 0x0080, 0, 3, 7),
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| D | clk-mt8192.c | 615 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel",
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