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Searched refs:CLK_INFRA_M4U (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt8135-clk.h128 #define CLK_INFRA_M4U 7 macro
Dmediatek,mt6795-clk.h161 #define CLK_INFRA_M4U 5 macro
Dmt8173-clk.h181 #define CLK_INFRA_M4U 6 macro
Dmt2712-clk.h230 #define CLK_INFRA_M4U 2 macro
Dmt2701-clk.h205 #define CLK_INFRA_M4U 8 macro
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt6795-infracfg.c51 GATE_ICG(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
Dclk-mt8135.c420 GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8),
573 clk_prepare_enable(clk_data->hws[CLK_INFRA_M4U]->clk); in mtk_infrasys_init()
Dclk-mt2701.c721 GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8),
Dclk-mt2712.c1013 GATE_INFRA(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
Dclk-mt8173.c638 GATE_ICG(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
/Linux-v6.1/arch/arm/boot/dts/
Dmt7623n.dtsi108 clocks = <&infracfg CLK_INFRA_M4U>;
Dmt2701.dtsi223 clocks = <&infracfg CLK_INFRA_M4U>;
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi330 clocks = <&infracfg CLK_INFRA_M4U>;
348 clocks = <&infracfg CLK_INFRA_M4U>;
Dmt8173.dtsi581 clocks = <&infracfg CLK_INFRA_M4U>;