Searched refs:uhs (Results 1 – 25 of 86) sorted by relevance
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| /Linux-v5.4/Documentation/devicetree/bindings/mmc/ |
| D | uniphier-sd.txt | 20 "uhs" - should exist for SD instance with UHS support
30 - sd-uhs-sdr12: see mmc.txt
31 - sd-uhs-sdr25: see mmc.txt
32 - sd-uhs-sdr50: see mmc.txt
42 pinctrl-names = "default", "uhs";
52 sd-uhs-sdr12;
53 sd-uhs-sdr25;
54 sd-uhs-sdr50;
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| D | sdhci-st.txt | 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
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| D | sdhci-sprd.txt | 24 - pinctrl-1: should contain uhs mode pin control
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
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| D | sdhci-cadence.txt | 33 - cdns,phy-input-delay-sd-uhs-sdr12:
36 - cdns,phy-input-delay-sd-uhs-sdr25:
39 - cdns,phy-input-delay-sd-uhs-sdr50:
42 - cdns,phy-input-delay-sd-uhs-ddr50:
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| D | brcm,sdhci-brcmstb.txt | 25 sd-uhs-sdr50;
26 sd-uhs-ddr50;
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| D | k3-dw-mshc.txt | 59 sd-uhs-sdr12;
60 sd-uhs-sdr25;
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| /Linux-v5.4/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a-rdb.dts | 22 sd-uhs-sdr104;
23 sd-uhs-sdr50;
24 sd-uhs-sdr25;
25 sd-uhs-sdr12;
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| D | fsl-lx2160a-rdb.dts | 39 sd-uhs-sdr104;
40 sd-uhs-sdr50;
41 sd-uhs-sdr25;
42 sd-uhs-sdr12;
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| D | fsl-ls1046a-rdb.dts | 40 sd-uhs-sdr104;
41 sd-uhs-sdr50;
42 sd-uhs-sdr25;
43 sd-uhs-sdr12;
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| D | fsl-ls1028a-rdb.dts | 87 sd-uhs-sdr104;
88 sd-uhs-sdr50;
89 sd-uhs-sdr25;
90 sd-uhs-sdr12;
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | stih410-b2120.dts | 32 sd-uhs-sdr50;
33 sd-uhs-sdr104;
34 sd-uhs-ddr50;
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| D | rk3288-veyron-sdmmc.dtsi | 83 sd-uhs-sdr12;
84 sd-uhs-sdr25;
85 sd-uhs-sdr50;
86 sd-uhs-sdr104;
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| D | imx6ull-colibri-eval-v3.dtsi | 159 sd-uhs-sdr12;
160 sd-uhs-sdr25;
161 sd-uhs-sdr50;
162 sd-uhs-sdr104;
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| D | stih418-b2199.dts | 82 sd-uhs-sdr50;
83 sd-uhs-sdr104;
84 sd-uhs-ddr50;
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| D | rk3288-phycore-rdk.dts | 231 sd-uhs-sdr12;
232 sd-uhs-sdr25;
233 sd-uhs-sdr50;
234 sd-uhs-sdr104;
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| D | rk3036-kylin.dts | 328 sd-uhs-sdr12;
329 sd-uhs-sdr25;
330 sd-uhs-sdr50;
331 sd-uhs-sdr104;
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| D | rk3288-firefly-reload.dts | 261 sd-uhs-sdr12;
262 sd-uhs-sdr25;
263 sd-uhs-sdr50;
264 sd-uhs-ddr50;
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| D | uniphier-ld4.dtsi | 253 pinctrl-names = "default", "uhs";
263 sd-uhs-sdr12;
264 sd-uhs-sdr25;
265 sd-uhs-sdr50;
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| /Linux-v5.4/arch/arm64/boot/dts/rockchip/ |
| D | px30-evb.dts | 182 sd-uhs-sdr12;
183 sd-uhs-sdr25;
184 sd-uhs-sdr50;
185 sd-uhs-sdr104;
195 sd-uhs-sdr104;
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| D | rk3328-roc-cc.dts | 306 sd-uhs-sdr12;
307 sd-uhs-sdr25;
308 sd-uhs-sdr50;
309 sd-uhs-sdr104;
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| /Linux-v5.4/drivers/mmc/host/ |
| D | sdhci-pxav3.c | 240 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) in pxav3_set_uhs_signaling() argument
254 switch (uhs) { in pxav3_set_uhs_signaling()
280 if (uhs == MMC_TIMING_UHS_SDR50 || in pxav3_set_uhs_signaling()
281 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
284 } else if (uhs == MMC_TIMING_MMC_HS) { in pxav3_set_uhs_signaling()
297 __func__, uhs, ctrl_2); in pxav3_set_uhs_signaling()
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| D | sdhci-st.c | 257 unsigned int uhs) in sdhci_st_set_uhs_signaling() argument
266 switch (uhs) { in sdhci_st_set_uhs_signaling()
300 "(uhs %d)\n", uhs); in sdhci_st_set_uhs_signaling()
302 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); in sdhci_st_set_uhs_signaling()
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| /Linux-v5.4/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxbb-p20x.dtsi | 193 sd-uhs-sdr12;
194 sd-uhs-sdr25;
195 sd-uhs-sdr50;
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| D | meson-gxbb-odroidc2.dts | 259 sd-uhs-sdr12;
260 sd-uhs-sdr25;
261 sd-uhs-sdr50;
262 sd-uhs-ddr50;
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| D | meson-gxbb-nanopi-k2.dts | 303 sd-uhs-sdr12;
304 sd-uhs-sdr25;
305 sd-uhs-sdr50;
306 sd-uhs-ddr50;
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