Searched refs:pll_state (Results 1 – 4 of 4) sorted by relevance
1275 static int skl_calc_wrpll_link(const struct intel_dpll_hw_state *pll_state) in skl_calc_wrpll_link() argument1279 p0 = pll_state->cfgcr2 & DPLL_CFGCR2_PDIV_MASK; in skl_calc_wrpll_link()1280 p2 = pll_state->cfgcr2 & DPLL_CFGCR2_KDIV_MASK; in skl_calc_wrpll_link()1282 if (pll_state->cfgcr2 & DPLL_CFGCR2_QDIV_MODE(1)) in skl_calc_wrpll_link()1283 p1 = (pll_state->cfgcr2 & DPLL_CFGCR2_QDIV_RATIO_MASK) >> 8; in skl_calc_wrpll_link()1318 dco_freq = (pll_state->cfgcr1 & DPLL_CFGCR1_DCO_INTEGER_MASK) in skl_calc_wrpll_link()1321 dco_freq += (((pll_state->cfgcr1 & DPLL_CFGCR1_DCO_FRACTION_MASK) >> 9) in skl_calc_wrpll_link()1331 struct intel_dpll_hw_state *pll_state) in cnl_calc_wrpll_link() argument1335 p0 = pll_state->cfgcr1 & DPLL_CFGCR1_PDIV_MASK; in cnl_calc_wrpll_link()1336 p2 = pll_state->cfgcr1 & DPLL_CFGCR1_KDIV_MASK; in cnl_calc_wrpll_link()[all …]
249 const struct intel_dpll_hw_state *pll_state, in intel_find_shared_dpll() argument270 if (memcmp(pll_state, in intel_find_shared_dpll()272 sizeof(*pll_state)) == 0) { in intel_find_shared_dpll()297 const struct intel_dpll_hw_state *pll_state) in intel_reference_shared_dpll() argument305 shared_dpll[id].hw_state = *pll_state; in intel_reference_shared_dpll()2572 struct intel_dpll_hw_state *pll_state) in icl_calc_dpll_state() argument2604 memset(pll_state, 0, sizeof(*pll_state)); in icl_calc_dpll_state()2606 pll_state->cfgcr0 = cfgcr0; in icl_calc_dpll_state()2607 pll_state->cfgcr1 = cfgcr1; in icl_calc_dpll_state()2698 struct intel_dpll_hw_state *pll_state) in icl_calc_mg_pll_state() argument[all …]
671 int pll_state; in stm32f4_pll_set_rate() local673 pll_state = stm32f4_pll_is_enabled(hw); in stm32f4_pll_set_rate()675 if (pll_state) in stm32f4_pll_set_rate()684 if (pll_state) in stm32f4_pll_set_rate()721 int pll_state, ret; in stm32f4_pll_div_set_rate() local726 pll_state = stm32f4_pll_is_enabled(pll_div->hw_pll); in stm32f4_pll_div_set_rate()728 if (pll_state) in stm32f4_pll_div_set_rate()733 if (pll_state) in stm32f4_pll_div_set_rate()
228 struct pll_state { struct248 struct pll_state a; argument249 struct pll_state b;466 struct pll_state *state; in wm8580_set_dai_pll()
