Searched refs:pll_readl (Results  1 – 2 of 2) sorted by relevance
| /Linux-v5.4/drivers/clk/pistachio/ | 
| D | clk-pll.c | 78 static inline u32 pll_readl(struct pistachio_clk_pll *pll, u32 reg)  in pll_readl()  function 90 	while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK))  in pll_lock() 110 	val = pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_DSMPD;  in pll_frac_get_mode() 119 	val = pll_readl(pll, PLL_CTRL3);  in pll_frac_set_mode() 162 	val = pll_readl(pll, PLL_CTRL3);  in pll_gf40lp_frac_enable() 167 	val = pll_readl(pll, PLL_CTRL4);  in pll_gf40lp_frac_enable() 181 	val = pll_readl(pll, PLL_CTRL3);  in pll_gf40lp_frac_disable() 190 	return !(pll_readl(pll, PLL_CTRL3) & PLL_FRAC_CTRL3_PD);  in pll_gf40lp_frac_is_enabled() 226 	val = pll_readl(pll, PLL_CTRL1);  in pll_gf40lp_frac_set_rate() 233 	val = pll_readl(pll, PLL_CTRL2);  in pll_gf40lp_frac_set_rate() [all …] 
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| /Linux-v5.4/drivers/clk/tegra/ | 
| D | clk-pll.c | 230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)  macro 231 #define pll_readl_base(p) pll_readl(p->params->base_reg, p) 232 #define pll_readl_misc(p) pll_readl(p->params->misc_reg, p) 234 #define pll_readl_sdm_din(p) pll_readl(p->params->sdm_din_reg, p) 235 #define pll_readl_sdm_ctrl(p) pll_readl(p->params->sdm_ctrl_reg, p) 352 		val = pll_readl(pll->params->iddq_reg, pll);  in _clk_pll_enable() 359 		val = pll_readl(pll->params->reset_reg, pll);  in _clk_pll_enable() 397 		val = pll_readl(pll->params->reset_reg, pll);  in _clk_pll_disable() 403 		val = pll_readl(pll->params->iddq_reg, pll);  in _clk_pll_disable() 413 		u32 val = pll_readl(pll->params->ssc_ctrl_reg, pll);  in pll_clk_start_ss() [all …] 
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