Searched refs:mtu3_readl (Results 1 – 8 of 8) sorted by relevance
/Linux-v5.4/drivers/usb/mtu3/ |
D | mtu3_core.c | 224 csr = mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)) & TX_W1C_BITS; in mtu3_ep_stall_set() 231 csr = mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)) & RX_W1C_BITS; in mtu3_ep_stall_set() 266 mtu3_readl(mbase, U3D_DEVICE_CONTROL)); in mtu3_start() 353 epnum, mtu3_readl(mbase, MU3D_EP_TXCR0(epnum)), in mtu3_config_ep() 354 mtu3_readl(mbase, MU3D_EP_TXCR1(epnum)), in mtu3_config_ep() 355 mtu3_readl(mbase, MU3D_EP_TXCR2(epnum))); in mtu3_config_ep() 389 epnum, mtu3_readl(mbase, MU3D_EP_RXCR0(epnum)), in mtu3_config_ep() 390 mtu3_readl(mbase, MU3D_EP_RXCR1(epnum)), in mtu3_config_ep() 391 mtu3_readl(mbase, MU3D_EP_RXCR2(epnum))); in mtu3_config_ep() 445 fifosize = mtu3_readl(mtu->mac_base, U3D_CAP_EPNTXFFSZ); in get_ep_fifo_config() [all …]
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D | mtu3_qmu.c | 78 txcpr = mtu3_readl(mbase, USB_QMU_TQCPR(epnum)); in read_txq_cur_addr() 79 txhiar = mtu3_readl(mbase, USB_QMU_TQHIAR(epnum)); in read_txq_cur_addr() 89 rxcpr = mtu3_readl(mbase, USB_QMU_RQCPR(epnum)); in read_rxq_cur_addr() 90 rxhiar = mtu3_readl(mbase, USB_QMU_RQHIAR(epnum)); in read_rxq_cur_addr() 101 tqhiar = mtu3_readl(mbase, USB_QMU_TQHIAR(epnum)); in write_txq_start_addr() 113 rqhiar = mtu3_readl(mbase, USB_QMU_RQHIAR(epnum)); in write_rxq_start_addr() 199 if (!(mtu3_readl(mbase, offset) & QMU_Q_ACTIVE)) in mtu3_qmu_resume() 342 if (mtu3_readl(mbase, USB_QMU_TQCSR(epnum)) & QMU_Q_ACTIVE) { in mtu3_qmu_start() 359 if (mtu3_readl(mbase, USB_QMU_RQCSR(epnum)) & QMU_Q_ACTIVE) { in mtu3_qmu_start() 381 if (!(mtu3_readl(mbase, qcsr) & QMU_Q_ACTIVE)) { in mtu3_qmu_stop() [all …]
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D | mtu3_gadget_ep0.c | 142 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_stall_set() 300 value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in handle_test_mode() 339 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL); in ep0_handle_feature_dev() 354 lpc = mtu3_readl(mbase, U3D_LINK_POWER_CONTROL); in ep0_handle_feature_dev() 450 dev_conf = mtu3_readl(mbase, U3D_DEVICE_CONF); in handle_standard_request() 512 csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_rx_state() 522 count = mtu3_readl(mbase, U3D_RXCOUNT0); in ep0_rx_state() 588 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_tx_state() 592 mtu3_readl(mtu->mac_base, U3D_EP0CSR)); in ep0_tx_state() 601 csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS; in ep0_read_setup() [all …]
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D | mtu3_host.c | 98 xhci_cap = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP); in host_ports_num_get() 128 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i)); in ssusb_host_enable() 136 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i)); in ssusb_host_enable() 163 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i)); in ssusb_host_disable() 171 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i)); in ssusb_host_disable()
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D | mtu3_dr.c | 62 value = mtu3_readl(ibase, SSUSB_U2_CTRL(0)); in ssusb_port0_switch() 67 value = mtu3_readl(ibase, SSUSB_U2_CTRL(0)); in ssusb_port0_switch() 74 value = mtu3_readl(ibase, SSUSB_U3_CTRL(0)); in ssusb_port0_switch() 79 value = mtu3_readl(ibase, SSUSB_U3_CTRL(0)); in ssusb_port0_switch() 305 value = mtu3_readl(ssusb->ippc_base, SSUSB_U2_CTRL(0)); in ssusb_set_force_mode()
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D | mtu3_debugfs.c | 84 mtu3_readl(mbase, U3D_USB20_OPSTATE), in mtu3_link_state_show() 85 LTSSM_STATE(mtu3_readl(mbase, U3D_LINK_STATE_MACHINE))); in mtu3_link_state_show() 303 mtu3_readl(mtu->ippc_base, (u32)regs->offset)); in mtu3_probe_show()
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D | mtu3.h | 401 static inline u32 mtu3_readl(void __iomem *base, u32 offset) in mtu3_readl() function
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D | mtu3_gadget.c | 450 return (int)mtu3_readl(mtu->mac_base, U3D_USB20_FRAME_NUM); in mtu3_gadget_get_frame()
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